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[RISCV] Enable fixed-length vectorization of LoopVectorizer for RISC-V Vector
By implementing the method "unsigned RISCVTTIImpl::getRegisterBitWidth(bool Vector)", fixed-length vectorization is enabled when possible. Without this method, the "#pragma clang loop" directive is needed to enable vectorization(or the cost model may inform LLVM that "Vectorization is possible but not beneficial"). Reviewed By: frasercrmck Differential Revision: https://reviews.llvm.org/D97549
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llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h

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@@ -51,6 +51,15 @@ class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
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bool shouldExpandReduction(const IntrinsicInst *II) const;
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bool supportsScalableVectors() const { return ST->hasStdExtV(); }
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Optional<unsigned> getMaxVScale() const;
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unsigned getRegisterBitWidth(bool Vector) const {
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if (Vector) {
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if (ST->hasStdExtV())
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return ST->getMinRVVVectorSizeInBits();
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return 0;
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}
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return ST->getXLen();
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}
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};
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} // end namespace llvm
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; RUN: opt < %s -loop-vectorize -mtriple=riscv64 -mattr=+experimental-v -riscv-v-vector-bits-min=128 -S | FileCheck %s
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; RUN: opt < %s -loop-vectorize -mtriple=riscv32 -mattr=+experimental-v -riscv-v-vector-bits-min=128 -S | FileCheck %s
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; Function Attrs: nounwind
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define i32* @array_add(i32* noalias nocapture readonly %a, i32* noalias nocapture readonly %b, i32* %c, i32 %size) {
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;CHECK-LABEL: array_add
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;CHECK: load <4 x i32>
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;CHECK: load <4 x i32>
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;CHECK: add nsw <4 x i32>
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;CHECK: store <4 x i32>
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;CHECK: ret
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entry:
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%cmp10 = icmp sgt i32 %size, 0
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br i1 %cmp10, label %for.body.preheader, label %for.end
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx2 = getelementptr inbounds i32, i32* %b, i64 %indvars.iv
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%1 = load i32, i32* %arrayidx2, align 4
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%add = add nsw i32 %1, %0
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%arrayidx4 = getelementptr inbounds i32, i32* %c, i64 %indvars.iv
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store i32 %add, i32* %arrayidx4, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %size
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br i1 %exitcond, label %for.end.loopexit, label %for.body
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for.end.loopexit: ; preds = %for.body
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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ret i32* %c
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}

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