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[RISCV][GISel] Allow G_AND/G_OR/G_XOR to have s32 types on RV64.
Even though we don't have W instructions for them. This treats them the same as other binary operators.
1 parent 02fcae8 commit d307dc5

16 files changed

+212
-172
lines changed

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -33,12 +33,7 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
3333

3434
using namespace TargetOpcode;
3535

36-
getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
37-
.legalFor({XLenLLT})
38-
.widenScalarToNextPow2(0)
39-
.clampScalar(0, XLenLLT, XLenLLT);
40-
41-
getActionDefinitionsBuilder({G_ADD, G_SUB})
36+
getActionDefinitionsBuilder({G_ADD, G_SUB, G_AND, G_OR, G_XOR})
4237
.legalFor({s32, XLenLLT})
4338
.widenScalarToNextPow2(0)
4439
.clampScalar(0, s32, XLenLLT);

llvm/lib/Target/RISCV/RISCVGISel.td

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -90,12 +90,22 @@ def : Pat<(XLenVT (sub GPR:$rs1, simm12Plus1:$imm)),
9090
let Predicates = [IsRV64] in {
9191
def : Pat<(i32 (add GPR:$rs1, GPR:$rs2)), (ADDW GPR:$rs1, GPR:$rs2)>;
9292
def : Pat<(i32 (sub GPR:$rs1, GPR:$rs2)), (SUBW GPR:$rs1, GPR:$rs2)>;
93+
def : Pat<(i32 (and GPR:$rs1, GPR:$rs2)), (AND GPR:$rs1, GPR:$rs2)>;
94+
def : Pat<(i32 (or GPR:$rs1, GPR:$rs2)), (OR GPR:$rs1, GPR:$rs2)>;
95+
def : Pat<(i32 (xor GPR:$rs1, GPR:$rs2)), (XOR GPR:$rs1, GPR:$rs2)>;
9396

9497
def : Pat<(i32 (add GPR:$rs1, simm12i32:$imm)),
9598
(ADDIW GPR:$rs1, (i64 (as_i64imm $imm)))>;
9699
def : Pat<(i32 (sub GPR:$rs1, simm12Plus1i32:$imm)),
97100
(ADDIW GPR:$rs1, (i64 (NegImm $imm)))>;
98101

102+
def : Pat<(i32 (and GPR:$rs1, simm12i32:$imm)),
103+
(ANDI GPR:$rs1, (i64 (as_i64imm $imm)))>;
104+
def : Pat<(i32 (or GPR:$rs1, simm12i32:$imm)),
105+
(ORI GPR:$rs1, (i64 (as_i64imm $imm)))>;
106+
def : Pat<(i32 (xor GPR:$rs1, simm12i32:$imm)),
107+
(XORI GPR:$rs1, (i64 (as_i64imm $imm)))>;
108+
99109
def : Pat<(i32 (shl GPR:$rs1, (i32 GPR:$rs2))), (SLLW GPR:$rs1, GPR:$rs2)>;
100110
def : Pat<(i32 (sra GPR:$rs1, (i32 GPR:$rs2))), (SRAW GPR:$rs1, GPR:$rs2)>;
101111
def : Pat<(i32 (srl GPR:$rs1, (i32 GPR:$rs2))), (SRLW GPR:$rs1, GPR:$rs2)>;

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-abs.mir

Lines changed: 9 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -15,11 +15,10 @@ body: |
1515
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[C]](s32)
1616
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[ASSERT_ZEXT]](s64)
1717
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC1]], [[ASHR1]]
18-
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32)
19-
; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[ASHR1]](s32)
20-
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ANYEXT]], [[ANYEXT1]]
18+
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ADD]], [[ASHR1]]
2119
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
22-
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[XOR]], [[C2]]
20+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[XOR]](s32)
21+
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C2]]
2322
; CHECK-NEXT: $x10 = COPY [[AND]](s64)
2423
; CHECK-NEXT: PseudoRET implicit $x10
2524
%1:_(s64) = COPY $x10
@@ -45,11 +44,10 @@ body: |
4544
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[C]](s32)
4645
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[ASSERT_SEXT]](s64)
4746
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC1]], [[ASHR1]]
48-
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32)
49-
; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[ASHR1]](s32)
50-
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ANYEXT]], [[ANYEXT1]]
47+
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ADD]], [[ASHR1]]
48+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[XOR]](s32)
5149
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
52-
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[XOR]], [[C2]](s64)
50+
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ANYEXT]], [[C2]](s64)
5351
; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C2]](s64)
5452
; CHECK-NEXT: $x10 = COPY [[ASHR2]](s64)
5553
; CHECK-NEXT: PseudoRET implicit $x10
@@ -72,11 +70,9 @@ body: |
7270
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
7371
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[TRUNC]], [[C]](s32)
7472
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[ASHR]]
75-
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32)
76-
; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[ASHR]](s32)
77-
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ANYEXT]], [[ANYEXT1]]
78-
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[XOR]], 32
79-
; CHECK-NEXT: $x10 = COPY [[SEXT_INREG]](s64)
73+
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ADD]], [[ASHR]]
74+
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[XOR]](s32)
75+
; CHECK-NEXT: $x10 = COPY [[SEXT]](s64)
8076
; CHECK-NEXT: PseudoRET implicit $x10
8177
%1:_(s64) = COPY $x10
8278
%2:_(s64) = G_ASSERT_SEXT %1, 32

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -195,11 +195,15 @@ body: |
195195
; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s64) = G_ADD [[ADD1]], [[AND]]
196196
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
197197
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[ADD2]](s64), [[C1]]
198-
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP2]], [[ICMP]]
199-
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[ICMP1]], [[AND1]]
198+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ICMP2]](s64)
199+
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[ICMP]](s64)
200+
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[TRUNC1]]
201+
; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[ICMP1]](s64)
202+
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[TRUNC2]], [[AND1]]
200203
; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s64) = G_ADD %hi1, %hi2
201204
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
202-
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[OR]], [[C2]]
205+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[OR]](s32)
206+
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C2]]
203207
; CHECK-NEXT: [[ADD4:%[0-9]+]]:_(s64) = G_ADD [[ADD3]], [[AND2]]
204208
; CHECK-NEXT: $x10 = COPY [[ADD]](s64)
205209
; CHECK-NEXT: $x11 = COPY [[ADD2]](s64)

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-addo-subo.mir

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -122,9 +122,12 @@ body: |
122122
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
123123
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ADD]](s64), [[COPY]]
124124
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[COPY1]](s64), [[C]]
125-
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ICMP1]], [[ICMP]]
125+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ICMP1]](s64)
126+
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[ICMP]](s64)
127+
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[TRUNC]], [[TRUNC1]]
128+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[XOR]](s32)
126129
; CHECK-NEXT: $x10 = COPY [[ADD]](s64)
127-
; CHECK-NEXT: $x11 = COPY [[XOR]](s64)
130+
; CHECK-NEXT: $x11 = COPY [[ANYEXT]](s64)
128131
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
129132
%0:_(s64) = COPY $x10
130133
%1:_(s64) = COPY $x11
@@ -255,9 +258,12 @@ body: |
255258
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
256259
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[SUB]](s64), [[COPY]]
257260
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[COPY1]](s64), [[C]]
258-
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ICMP1]], [[ICMP]]
261+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ICMP1]](s64)
262+
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[ICMP]](s64)
263+
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[TRUNC]], [[TRUNC1]]
264+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[XOR]](s32)
259265
; CHECK-NEXT: $x10 = COPY [[SUB]](s64)
260-
; CHECK-NEXT: $x11 = COPY [[XOR]](s64)
266+
; CHECK-NEXT: $x11 = COPY [[ANYEXT]](s64)
261267
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
262268
%0:_(s64) = COPY $x10
263269
%1:_(s64) = COPY $x11

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir

Lines changed: 20 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -8,8 +8,11 @@ body: |
88
; CHECK-LABEL: name: and_i8
99
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
1010
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
11-
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
12-
; CHECK-NEXT: $x10 = COPY [[AND]](s64)
11+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
12+
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
13+
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[TRUNC1]]
14+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[AND]](s32)
15+
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
1316
; CHECK-NEXT: PseudoRET implicit $x10
1417
%0:_(s64) = COPY $x10
1518
%1:_(s64) = COPY $x11
@@ -28,8 +31,11 @@ body: |
2831
; CHECK-LABEL: name: and_i15
2932
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
3033
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
31-
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
32-
; CHECK-NEXT: $x10 = COPY [[AND]](s64)
34+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
35+
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
36+
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[TRUNC1]]
37+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[AND]](s32)
38+
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
3339
; CHECK-NEXT: PseudoRET implicit $x10
3440
%0:_(s64) = COPY $x10
3541
%1:_(s64) = COPY $x11
@@ -48,8 +54,11 @@ body: |
4854
; CHECK-LABEL: name: and_i16
4955
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
5056
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
51-
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
52-
; CHECK-NEXT: $x10 = COPY [[AND]](s64)
57+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
58+
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
59+
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[TRUNC1]]
60+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[AND]](s32)
61+
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
5362
; CHECK-NEXT: PseudoRET implicit $x10
5463
%0:_(s64) = COPY $x10
5564
%1:_(s64) = COPY $x11
@@ -68,8 +77,11 @@ body: |
6877
; CHECK-LABEL: name: and_i32
6978
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
7079
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
71-
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
72-
; CHECK-NEXT: $x10 = COPY [[AND]](s64)
80+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
81+
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
82+
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[TRUNC1]]
83+
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[AND]](s32)
84+
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
7385
; CHECK-NEXT: PseudoRET implicit $x10
7486
%0:_(s64) = COPY $x10
7587
%1:_(s64) = COPY $x11

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-ashr.mir

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -8,14 +8,14 @@ body: |
88
; CHECK-LABEL: name: ashr_i8
99
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
1010
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
11-
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
12-
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
13-
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
11+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
12+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
13+
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
1414
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
1515
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
1616
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
1717
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
18-
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[TRUNC]](s32)
18+
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[AND]](s32)
1919
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ASHR1]](s32)
2020
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
2121
; CHECK-NEXT: PseudoRET implicit $x10
@@ -36,14 +36,14 @@ body: |
3636
; CHECK-LABEL: name: ashr_i15
3737
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
3838
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
39-
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767
40-
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
41-
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
39+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
40+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
41+
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
4242
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
4343
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
4444
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
4545
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
46-
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[TRUNC]](s32)
46+
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[AND]](s32)
4747
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ASHR1]](s32)
4848
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
4949
; CHECK-NEXT: PseudoRET implicit $x10
@@ -64,14 +64,14 @@ body: |
6464
; CHECK-LABEL: name: ashr_i16
6565
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
6666
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
67-
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
68-
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
69-
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
67+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
68+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
69+
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
7070
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
7171
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
7272
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
7373
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
74-
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[TRUNC]](s32)
74+
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[AND]](s32)
7575
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ASHR1]](s32)
7676
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
7777
; CHECK-NEXT: PseudoRET implicit $x10

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-div.mir

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -332,13 +332,13 @@ body: |
332332
; CHECK-M-LABEL: name: udiv_i8
333333
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
334334
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
335-
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
336-
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
337-
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
338-
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
339-
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
340-
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
341-
; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[TRUNC]], [[TRUNC1]]
335+
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
336+
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
337+
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
338+
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
339+
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
340+
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C1]]
341+
; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[AND]], [[AND1]]
342342
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UDIV]](s32)
343343
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
344344
; CHECK-M-NEXT: PseudoRET implicit $x10
@@ -373,13 +373,13 @@ body: |
373373
; CHECK-M-LABEL: name: udiv_i15
374374
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
375375
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
376-
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767
377-
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
378-
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
379-
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767
380-
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
381-
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
382-
; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[TRUNC]], [[TRUNC1]]
376+
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
377+
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
378+
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
379+
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32767
380+
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
381+
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C1]]
382+
; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[AND]], [[AND1]]
383383
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UDIV]](s32)
384384
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
385385
; CHECK-M-NEXT: PseudoRET implicit $x10
@@ -414,13 +414,13 @@ body: |
414414
; CHECK-M-LABEL: name: udiv_i16
415415
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
416416
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
417-
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
418-
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
419-
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
420-
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
421-
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
422-
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
423-
; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[TRUNC]], [[TRUNC1]]
417+
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
418+
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
419+
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
420+
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
421+
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
422+
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C1]]
423+
; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[AND]], [[AND1]]
424424
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UDIV]](s32)
425425
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
426426
; CHECK-M-NEXT: PseudoRET implicit $x10

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