Skip to content

Commit d8667f1

Browse files
adibiagiotstellar
adibiagio
authored and
tstellar
committed
[MCA][NFC] Add tests for PR51318 and PR51322.
Also, regenerate existing X86 tests using update_mca_test.py. (cherry picked from commit f0658c7)
1 parent 4d99370 commit d8667f1

24 files changed

+267
-0
lines changed

‎llvm/test/tools/llvm-mca/X86/Barcelona/load-store-throughput.s

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -76,6 +76,7 @@ movaps %xmm3, (%rbx)
7676
# CHECK-NEXT: LQ - Load queue full: 0
7777
# CHECK-NEXT: SQ - Store queue full: 0
7878
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
79+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
7980

8081
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
8182
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -172,6 +173,7 @@ movaps %xmm3, (%rbx)
172173
# CHECK-NEXT: LQ - Load queue full: 0
173174
# CHECK-NEXT: SQ - Store queue full: 0
174175
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
176+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
175177

176178
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
177179
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -268,6 +270,7 @@ movaps %xmm3, (%rbx)
268270
# CHECK-NEXT: LQ - Load queue full: 0
269271
# CHECK-NEXT: SQ - Store queue full: 0
270272
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
273+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
271274

272275
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
273276
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -364,6 +367,7 @@ movaps %xmm3, (%rbx)
364367
# CHECK-NEXT: LQ - Load queue full: 0
365368
# CHECK-NEXT: SQ - Store queue full: 0
366369
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
370+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
367371

368372
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
369373
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -460,6 +464,7 @@ movaps %xmm3, (%rbx)
460464
# CHECK-NEXT: LQ - Load queue full: 0
461465
# CHECK-NEXT: SQ - Store queue full: 0
462466
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
467+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
463468

464469
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
465470
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -556,6 +561,7 @@ movaps %xmm3, (%rbx)
556561
# CHECK-NEXT: LQ - Load queue full: 0
557562
# CHECK-NEXT: SQ - Store queue full: 0
558563
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
564+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
559565

560566
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
561567
# CHECK-NEXT: [# dispatched], [# cycles]

‎llvm/test/tools/llvm-mca/X86/Barcelona/load-throughput.s

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -76,6 +76,7 @@ movaps (%rbx), %xmm3
7676
# CHECK-NEXT: LQ - Load queue full: 0
7777
# CHECK-NEXT: SQ - Store queue full: 0
7878
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
79+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
7980

8081
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
8182
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -172,6 +173,7 @@ movaps (%rbx), %xmm3
172173
# CHECK-NEXT: LQ - Load queue full: 0
173174
# CHECK-NEXT: SQ - Store queue full: 0
174175
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
176+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
175177

176178
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
177179
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -268,6 +270,7 @@ movaps (%rbx), %xmm3
268270
# CHECK-NEXT: LQ - Load queue full: 0
269271
# CHECK-NEXT: SQ - Store queue full: 0
270272
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
273+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
271274

272275
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
273276
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -364,6 +367,7 @@ movaps (%rbx), %xmm3
364367
# CHECK-NEXT: LQ - Load queue full: 0
365368
# CHECK-NEXT: SQ - Store queue full: 0
366369
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
370+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
367371

368372
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
369373
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -460,6 +464,7 @@ movaps (%rbx), %xmm3
460464
# CHECK-NEXT: LQ - Load queue full: 0
461465
# CHECK-NEXT: SQ - Store queue full: 0
462466
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
467+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
463468

464469
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
465470
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -556,6 +561,7 @@ movaps (%rbx), %xmm3
556561
# CHECK-NEXT: LQ - Load queue full: 0
557562
# CHECK-NEXT: SQ - Store queue full: 0
558563
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
564+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
559565

560566
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
561567
# CHECK-NEXT: [# dispatched], [# cycles]

‎llvm/test/tools/llvm-mca/X86/Barcelona/store-throughput.s

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -76,6 +76,7 @@ movaps %xmm3, (%rbx)
7676
# CHECK-NEXT: LQ - Load queue full: 0
7777
# CHECK-NEXT: SQ - Store queue full: 0
7878
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
79+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
7980

8081
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
8182
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -173,6 +174,7 @@ movaps %xmm3, (%rbx)
173174
# CHECK-NEXT: LQ - Load queue full: 0
174175
# CHECK-NEXT: SQ - Store queue full: 0
175176
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
177+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
176178

177179
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
178180
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -270,6 +272,7 @@ movaps %xmm3, (%rbx)
270272
# CHECK-NEXT: LQ - Load queue full: 0
271273
# CHECK-NEXT: SQ - Store queue full: 0
272274
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
275+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
273276

274277
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
275278
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -367,6 +370,7 @@ movaps %xmm3, (%rbx)
367370
# CHECK-NEXT: LQ - Load queue full: 0
368371
# CHECK-NEXT: SQ - Store queue full: 0
369372
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
373+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
370374

371375
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
372376
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -464,6 +468,7 @@ movaps %xmm3, (%rbx)
464468
# CHECK-NEXT: LQ - Load queue full: 0
465469
# CHECK-NEXT: SQ - Store queue full: 0
466470
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
471+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
467472

468473
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
469474
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -561,6 +566,7 @@ movaps %xmm3, (%rbx)
561566
# CHECK-NEXT: LQ - Load queue full: 0
562567
# CHECK-NEXT: SQ - Store queue full: 0
563568
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
569+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
564570

565571
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
566572
# CHECK-NEXT: [# dispatched], [# cycles]

‎llvm/test/tools/llvm-mca/X86/BdVer2/load-store-throughput.s

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -76,6 +76,7 @@ movaps %xmm3, (%rbx)
7676
# CHECK-NEXT: LQ - Load queue full: 0
7777
# CHECK-NEXT: SQ - Store queue full: 0
7878
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
79+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
7980

8081
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
8182
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -193,6 +194,7 @@ movaps %xmm3, (%rbx)
193194
# CHECK-NEXT: LQ - Load queue full: 0
194195
# CHECK-NEXT: SQ - Store queue full: 0
195196
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
197+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
196198

197199
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
198200
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -310,6 +312,7 @@ movaps %xmm3, (%rbx)
310312
# CHECK-NEXT: LQ - Load queue full: 0
311313
# CHECK-NEXT: SQ - Store queue full: 0
312314
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
315+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
313316

314317
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
315318
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -427,6 +430,7 @@ movaps %xmm3, (%rbx)
427430
# CHECK-NEXT: LQ - Load queue full: 0
428431
# CHECK-NEXT: SQ - Store queue full: 0
429432
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
433+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
430434

431435
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
432436
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -544,6 +548,7 @@ movaps %xmm3, (%rbx)
544548
# CHECK-NEXT: LQ - Load queue full: 0
545549
# CHECK-NEXT: SQ - Store queue full: 432 (78.1%)
546550
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
551+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
547552

548553
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
549554
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -661,6 +666,7 @@ movaps %xmm3, (%rbx)
661666
# CHECK-NEXT: LQ - Load queue full: 0
662667
# CHECK-NEXT: SQ - Store queue full: 0
663668
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
669+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
664670

665671
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
666672
# CHECK-NEXT: [# dispatched], [# cycles]

‎llvm/test/tools/llvm-mca/X86/BdVer2/load-throughput.s

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -83,6 +83,7 @@ vmovaps (%rbx), %ymm3
8383
# CHECK-NEXT: LQ - Load queue full: 354 (87.2%)
8484
# CHECK-NEXT: SQ - Store queue full: 0
8585
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
86+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
8687

8788
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
8889
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -197,6 +198,7 @@ vmovaps (%rbx), %ymm3
197198
# CHECK-NEXT: LQ - Load queue full: 354 (87.2%)
198199
# CHECK-NEXT: SQ - Store queue full: 0
199200
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
201+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
200202

201203
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
202204
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -311,6 +313,7 @@ vmovaps (%rbx), %ymm3
311313
# CHECK-NEXT: LQ - Load queue full: 354 (87.2%)
312314
# CHECK-NEXT: SQ - Store queue full: 0
313315
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
316+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
314317

315318
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
316319
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -425,6 +428,7 @@ vmovaps (%rbx), %ymm3
425428
# CHECK-NEXT: LQ - Load queue full: 354 (87.2%)
426429
# CHECK-NEXT: SQ - Store queue full: 0
427430
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
431+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
428432

429433
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
430434
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -539,6 +543,7 @@ vmovaps (%rbx), %ymm3
539543
# CHECK-NEXT: LQ - Load queue full: 533 (88.1%)
540544
# CHECK-NEXT: SQ - Store queue full: 0
541545
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
546+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
542547

543548
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
544549
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -654,6 +659,7 @@ vmovaps (%rbx), %ymm3
654659
# CHECK-NEXT: LQ - Load queue full: 533 (88.1%)
655660
# CHECK-NEXT: SQ - Store queue full: 0
656661
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
662+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
657663

658664
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
659665
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -769,6 +775,7 @@ vmovaps (%rbx), %ymm3
769775
# CHECK-NEXT: LQ - Load queue full: 345 (57.0%)
770776
# CHECK-NEXT: SQ - Store queue full: 0
771777
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
778+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
772779

773780
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
774781
# CHECK-NEXT: [# dispatched], [# cycles]

‎llvm/test/tools/llvm-mca/X86/BdVer2/register-files-1.s

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@ vmulps %xmm0, %xmm0, %xmm0
2121
# CHECK-NEXT: LQ - Load queue full: 0
2222
# CHECK-NEXT: SQ - Store queue full: 0
2323
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
24+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
2425

2526
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
2627
# CHECK-NEXT: [# dispatched], [# cycles]

‎llvm/test/tools/llvm-mca/X86/BdVer2/register-files-2.s

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@ vmulps %xmm0, %xmm0, %xmm0
2121
# CHECK-NEXT: LQ - Load queue full: 0
2222
# CHECK-NEXT: SQ - Store queue full: 0
2323
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
24+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
2425

2526
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
2627
# CHECK-NEXT: [# dispatched], [# cycles]

‎llvm/test/tools/llvm-mca/X86/BdVer2/register-files-3.s

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@ idiv %eax
3131
# CHECK-NEXT: LQ - Load queue full: 0
3232
# CHECK-NEXT: SQ - Store queue full: 0
3333
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
34+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
3435

3536
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
3637
# CHECK-NEXT: [# dispatched], [# cycles]

‎llvm/test/tools/llvm-mca/X86/BdVer2/register-files-4.s

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@ idiv %eax
3131
# CHECK-NEXT: LQ - Load queue full: 0
3232
# CHECK-NEXT: SQ - Store queue full: 0
3333
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
34+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
3435

3536
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
3637
# CHECK-NEXT: [# dispatched], [# cycles]

‎llvm/test/tools/llvm-mca/X86/BdVer2/register-files-5.s

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,7 @@
5252
# CHECK-NEXT: LQ - Load queue full: 0
5353
# CHECK-NEXT: SQ - Store queue full: 0
5454
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
55+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
5556

5657
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
5758
# CHECK-NEXT: [# dispatched], [# cycles]

‎llvm/test/tools/llvm-mca/X86/BdVer2/store-throughput.s

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -83,6 +83,7 @@ vmovaps %ymm3, (%rbx)
8383
# CHECK-NEXT: LQ - Load queue full: 0
8484
# CHECK-NEXT: SQ - Store queue full: 371 (92.1%)
8585
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
86+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
8687

8788
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
8889
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -197,6 +198,7 @@ vmovaps %ymm3, (%rbx)
197198
# CHECK-NEXT: LQ - Load queue full: 0
198199
# CHECK-NEXT: SQ - Store queue full: 371 (92.1%)
199200
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
201+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
200202

201203
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
202204
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -311,6 +313,7 @@ vmovaps %ymm3, (%rbx)
311313
# CHECK-NEXT: LQ - Load queue full: 0
312314
# CHECK-NEXT: SQ - Store queue full: 371 (92.1%)
313315
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
316+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
314317

315318
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
316319
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -425,6 +428,7 @@ vmovaps %ymm3, (%rbx)
425428
# CHECK-NEXT: LQ - Load queue full: 0
426429
# CHECK-NEXT: SQ - Store queue full: 371 (92.1%)
427430
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
431+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
428432

429433
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
430434
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -539,6 +543,7 @@ vmovaps %ymm3, (%rbx)
539543
# CHECK-NEXT: LQ - Load queue full: 0
540544
# CHECK-NEXT: SQ - Store queue full: 748 (93.2%)
541545
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
546+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
542547

543548
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
544549
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -655,6 +660,7 @@ vmovaps %ymm3, (%rbx)
655660
# CHECK-NEXT: LQ - Load queue full: 0
656661
# CHECK-NEXT: SQ - Store queue full: 559 (92.9%)
657662
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
663+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
658664

659665
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
660666
# CHECK-NEXT: [# dispatched], [# cycles]
@@ -770,6 +776,7 @@ vmovaps %ymm3, (%rbx)
770776
# CHECK-NEXT: LQ - Load queue full: 0
771777
# CHECK-NEXT: SQ - Store queue full: 561 (7.8%)
772778
# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0
779+
# CHECK-NEXT: USH - Uncategorised Structural Hazard: 0
773780

774781
# CHECK: Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
775782
# CHECK-NEXT: [# dispatched], [# cycles]

0 commit comments

Comments
 (0)