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[CodeGen][NFC] Add wrapper method for MBBMap (llvm#101893)
This is a preparation for changing the data structure of MBBMap.
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11 files changed

+70
-70
lines changed

11 files changed

+70
-70
lines changed

‎llvm/include/llvm/CodeGen/FunctionLoweringInfo.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -212,6 +212,10 @@ class FunctionLoweringInfo {
212212
return ValueMap.count(V);
213213
}
214214

215+
MachineBasicBlock *getMBB(const BasicBlock *BB) const {
216+
return MBBMap.lookup(BB);
217+
}
218+
215219
Register CreateReg(MVT VT, bool isDivergent = false);
216220

217221
Register CreateRegs(const Value *V);

‎llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1838,7 +1838,7 @@ bool FastISel::selectOperator(const User *I, unsigned Opcode) {
18381838

18391839
if (BI->isUnconditional()) {
18401840
const BasicBlock *LLVMSucc = BI->getSuccessor(0);
1841-
MachineBasicBlock *MSucc = FuncInfo.MBBMap[LLVMSucc];
1841+
MachineBasicBlock *MSucc = FuncInfo.getMBB(LLVMSucc);
18421842
fastEmitBranch(MSucc, BI->getDebugLoc());
18431843
return true;
18441844
}
@@ -2248,7 +2248,7 @@ bool FastISel::handlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) {
22482248
for (const BasicBlock *SuccBB : successors(LLVMBB)) {
22492249
if (!isa<PHINode>(SuccBB->begin()))
22502250
continue;
2251-
MachineBasicBlock *SuccMBB = FuncInfo.MBBMap[SuccBB];
2251+
MachineBasicBlock *SuccMBB = FuncInfo.getMBB(SuccBB);
22522252

22532253
// If this terminator has multiple identical successors (common for
22542254
// switches), only handle each succ once.
@@ -2372,7 +2372,7 @@ bool FastISel::canFoldAddIntoGEP(const User *GEP, const Value *Add) {
23722372
return false;
23732373
// Must be in the same basic block.
23742374
if (isa<Instruction>(Add) &&
2375-
FuncInfo.MBBMap[cast<Instruction>(Add)->getParent()] != FuncInfo.MBB)
2375+
FuncInfo.getMBB(cast<Instruction>(Add)->getParent()) != FuncInfo.MBB)
23762376
return false;
23772377
// Must have a constant operand.
23782378
return isa<ConstantInt>(cast<AddOperator>(Add)->getOperand(1));

‎llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp

Lines changed: 10 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -307,20 +307,16 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
307307
for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
308308
for (WinEHHandlerType &H : TBME.HandlerArray) {
309309
if (H.Handler)
310-
H.Handler = MBBMap[cast<const BasicBlock *>(H.Handler)];
310+
H.Handler = getMBB(cast<const BasicBlock *>(H.Handler));
311311
}
312312
}
313313
for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
314314
if (UME.Cleanup)
315-
UME.Cleanup = MBBMap[cast<const BasicBlock *>(UME.Cleanup)];
316-
for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
317-
const auto *BB = cast<const BasicBlock *>(UME.Handler);
318-
UME.Handler = MBBMap[BB];
319-
}
320-
for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
321-
const auto *BB = cast<const BasicBlock *>(CME.Handler);
322-
CME.Handler = MBBMap[BB];
323-
}
315+
UME.Cleanup = getMBB(cast<const BasicBlock *>(UME.Cleanup));
316+
for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap)
317+
UME.Handler = getMBB(cast<const BasicBlock *>(UME.Handler));
318+
for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap)
319+
CME.Handler = getMBB(cast<const BasicBlock *>(CME.Handler));
324320
} else if (Personality == EHPersonality::Wasm_CXX) {
325321
WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
326322
calculateWasmEHInfo(&fn, EHInfo);
@@ -330,16 +326,16 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
330326
for (auto &KV : EHInfo.SrcToUnwindDest) {
331327
const auto *Src = cast<const BasicBlock *>(KV.first);
332328
const auto *Dest = cast<const BasicBlock *>(KV.second);
333-
SrcToUnwindDest[MBBMap[Src]] = MBBMap[Dest];
329+
SrcToUnwindDest[getMBB(Src)] = getMBB(Dest);
334330
}
335331
EHInfo.SrcToUnwindDest = std::move(SrcToUnwindDest);
336332
DenseMap<BBOrMBB, SmallPtrSet<BBOrMBB, 4>> UnwindDestToSrcs;
337333
for (auto &KV : EHInfo.UnwindDestToSrcs) {
338334
const auto *Dest = cast<const BasicBlock *>(KV.first);
339-
UnwindDestToSrcs[MBBMap[Dest]] = SmallPtrSet<BBOrMBB, 4>();
335+
MachineBasicBlock *DestMBB = getMBB(Dest);
336+
UnwindDestToSrcs[DestMBB] = SmallPtrSet<BBOrMBB, 4>();
340337
for (const auto P : KV.second)
341-
UnwindDestToSrcs[MBBMap[Dest]].insert(
342-
MBBMap[cast<const BasicBlock *>(P)]);
338+
UnwindDestToSrcs[DestMBB].insert(getMBB(cast<const BasicBlock *>(P)));
343339
}
344340
EHInfo.UnwindDestToSrcs = std::move(UnwindDestToSrcs);
345341
}

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1952,7 +1952,7 @@ SDValue SelectionDAGBuilder::getValueImpl(const Value *V) {
19521952
return DAG.getMDNode(cast<MDNode>(MD->getMetadata()));
19531953

19541954
if (const auto *BB = dyn_cast<BasicBlock>(V))
1955-
return DAG.getBasicBlock(FuncInfo.MBBMap[BB]);
1955+
return DAG.getBasicBlock(FuncInfo.getMBB(BB));
19561956

19571957
llvm_unreachable("Can't get register for value!");
19581958
}
@@ -1972,7 +1972,7 @@ void SelectionDAGBuilder::visitCatchPad(const CatchPadInst &I) {
19721972

19731973
void SelectionDAGBuilder::visitCatchRet(const CatchReturnInst &I) {
19741974
// Update machine-CFG edge.
1975-
MachineBasicBlock *TargetMBB = FuncInfo.MBBMap[I.getSuccessor()];
1975+
MachineBasicBlock *TargetMBB = FuncInfo.getMBB(I.getSuccessor());
19761976
FuncInfo.MBB->addSuccessor(TargetMBB);
19771977
TargetMBB->setIsEHCatchretTarget(true);
19781978
DAG.getMachineFunction().setHasEHCatchret(true);
@@ -2000,7 +2000,7 @@ void SelectionDAGBuilder::visitCatchRet(const CatchReturnInst &I) {
20002000
else
20012001
SuccessorColor = cast<Instruction>(ParentPad)->getParent();
20022002
assert(SuccessorColor && "No parent funclet for catchret!");
2003-
MachineBasicBlock *SuccessorColorMBB = FuncInfo.MBBMap[SuccessorColor];
2003+
MachineBasicBlock *SuccessorColorMBB = FuncInfo.getMBB(SuccessorColor);
20042004
assert(SuccessorColorMBB && "No MBB for SuccessorColor!");
20052005

20062006
// Create the terminator node.
@@ -2056,14 +2056,14 @@ static void findWasmUnwindDestinations(
20562056
const Instruction *Pad = EHPadBB->getFirstNonPHI();
20572057
if (isa<CleanupPadInst>(Pad)) {
20582058
// Stop on cleanup pads.
2059-
UnwindDests.emplace_back(FuncInfo.MBBMap[EHPadBB], Prob);
2059+
UnwindDests.emplace_back(FuncInfo.getMBB(EHPadBB), Prob);
20602060
UnwindDests.back().first->setIsEHScopeEntry();
20612061
break;
20622062
} else if (const auto *CatchSwitch = dyn_cast<CatchSwitchInst>(Pad)) {
20632063
// Add the catchpad handlers to the possible destinations. We don't
20642064
// continue to the unwind destination of the catchswitch for wasm.
20652065
for (const BasicBlock *CatchPadBB : CatchSwitch->handlers()) {
2066-
UnwindDests.emplace_back(FuncInfo.MBBMap[CatchPadBB], Prob);
2066+
UnwindDests.emplace_back(FuncInfo.getMBB(CatchPadBB), Prob);
20672067
UnwindDests.back().first->setIsEHScopeEntry();
20682068
}
20692069
break;
@@ -2105,19 +2105,19 @@ static void findUnwindDestinations(
21052105
BasicBlock *NewEHPadBB = nullptr;
21062106
if (isa<LandingPadInst>(Pad)) {
21072107
// Stop on landingpads. They are not funclets.
2108-
UnwindDests.emplace_back(FuncInfo.MBBMap[EHPadBB], Prob);
2108+
UnwindDests.emplace_back(FuncInfo.getMBB(EHPadBB), Prob);
21092109
break;
21102110
} else if (isa<CleanupPadInst>(Pad)) {
21112111
// Stop on cleanup pads. Cleanups are always funclet entries for all known
21122112
// personalities.
2113-
UnwindDests.emplace_back(FuncInfo.MBBMap[EHPadBB], Prob);
2113+
UnwindDests.emplace_back(FuncInfo.getMBB(EHPadBB), Prob);
21142114
UnwindDests.back().first->setIsEHScopeEntry();
21152115
UnwindDests.back().first->setIsEHFuncletEntry();
21162116
break;
21172117
} else if (const auto *CatchSwitch = dyn_cast<CatchSwitchInst>(Pad)) {
21182118
// Add the catchpad handlers to the possible destinations.
21192119
for (const BasicBlock *CatchPadBB : CatchSwitch->handlers()) {
2120-
UnwindDests.emplace_back(FuncInfo.MBBMap[CatchPadBB], Prob);
2120+
UnwindDests.emplace_back(FuncInfo.getMBB(CatchPadBB), Prob);
21212121
// For MSVC++ and the CLR, catchblocks are funclets and need prologues.
21222122
if (IsMSVCCXX || IsCoreCLR)
21232123
UnwindDests.back().first->setIsEHFuncletEntry();
@@ -2777,7 +2777,7 @@ void SelectionDAGBuilder::visitBr(const BranchInst &I) {
27772777
MachineBasicBlock *BrMBB = FuncInfo.MBB;
27782778

27792779
// Update machine-CFG edges.
2780-
MachineBasicBlock *Succ0MBB = FuncInfo.MBBMap[I.getSuccessor(0)];
2780+
MachineBasicBlock *Succ0MBB = FuncInfo.getMBB(I.getSuccessor(0));
27812781

27822782
if (I.isUnconditional()) {
27832783
// Update machine-CFG edges.
@@ -2799,7 +2799,7 @@ void SelectionDAGBuilder::visitBr(const BranchInst &I) {
27992799
// If this condition is one of the special cases we handle, do special stuff
28002800
// now.
28012801
const Value *CondVal = I.getCondition();
2802-
MachineBasicBlock *Succ1MBB = FuncInfo.MBBMap[I.getSuccessor(1)];
2802+
MachineBasicBlock *Succ1MBB = FuncInfo.getMBB(I.getSuccessor(1));
28032803

28042804
// If this is a series of conditions that are or'd or and'd together, emit
28052805
// this as a sequence of branches instead of setcc's with and/or operations.
@@ -3317,9 +3317,9 @@ void SelectionDAGBuilder::visitInvoke(const InvokeInst &I) {
33173317

33183318
// Retrieve successors. Look through artificial IR level blocks like
33193319
// catchswitch for successors.
3320-
MachineBasicBlock *Return = FuncInfo.MBBMap[I.getSuccessor(0)];
3320+
MachineBasicBlock *Return = FuncInfo.getMBB(I.getSuccessor(0));
33213321
const BasicBlock *EHPadBB = I.getSuccessor(1);
3322-
MachineBasicBlock *EHPadMBB = FuncInfo.MBBMap[EHPadBB];
3322+
MachineBasicBlock *EHPadMBB = FuncInfo.getMBB(EHPadBB);
33233323

33243324
// Deopt and ptrauth bundles are lowered in helper functions, and we don't
33253325
// have to do anything here to lower funclet bundles.
@@ -3427,13 +3427,13 @@ void SelectionDAGBuilder::visitCallBr(const CallBrInst &I) {
34273427
// Retrieve successors.
34283428
SmallPtrSet<BasicBlock *, 8> Dests;
34293429
Dests.insert(I.getDefaultDest());
3430-
MachineBasicBlock *Return = FuncInfo.MBBMap[I.getDefaultDest()];
3430+
MachineBasicBlock *Return = FuncInfo.getMBB(I.getDefaultDest());
34313431

34323432
// Update successor info.
34333433
addSuccessorWithProb(CallBrMBB, Return, BranchProbability::getOne());
34343434
for (unsigned i = 0, e = I.getNumIndirectDests(); i < e; ++i) {
34353435
BasicBlock *Dest = I.getIndirectDest(i);
3436-
MachineBasicBlock *Target = FuncInfo.MBBMap[Dest];
3436+
MachineBasicBlock *Target = FuncInfo.getMBB(Dest);
34373437
Target->setIsInlineAsmBrIndirectTarget();
34383438
Target->setMachineBlockAddressTaken();
34393439
Target->setLabelMustBeEmitted();
@@ -3525,7 +3525,7 @@ void SelectionDAGBuilder::visitIndirectBr(const IndirectBrInst &I) {
35253525
if (!Inserted)
35263526
continue;
35273527

3528-
MachineBasicBlock *Succ = FuncInfo.MBBMap[BB];
3528+
MachineBasicBlock *Succ = FuncInfo.getMBB(BB);
35293529
addSuccessorWithProb(IndirectBrMBB, Succ);
35303530
}
35313531
IndirectBrMBB->normalizeSuccProbs();
@@ -8628,7 +8628,7 @@ SDValue SelectionDAGBuilder::lowerStartEH(SDValue Chain,
86288628
unsigned CallSiteIndex = FuncInfo.getCurrentCallSite();
86298629
if (CallSiteIndex) {
86308630
MF.setCallSiteBeginLabel(BeginLabel, CallSiteIndex);
8631-
LPadToCallSiteMap[FuncInfo.MBBMap[EHPadBB]].push_back(CallSiteIndex);
8631+
LPadToCallSiteMap[FuncInfo.getMBB(EHPadBB)].push_back(CallSiteIndex);
86328632

86338633
// Now that the call site is handled, stop tracking it.
86348634
FuncInfo.setCurrentCallSite(0);
@@ -8659,7 +8659,7 @@ SDValue SelectionDAGBuilder::lowerEndEH(SDValue Chain, const InvokeInst *II,
86598659
EHInfo->addIPToStateRange(II, BeginLabel, EndLabel);
86608660
} else if (!isScopedEHPersonality(Pers)) {
86618661
assert(EHPadBB);
8662-
MF.addInvoke(FuncInfo.MBBMap[EHPadBB], BeginLabel, EndLabel);
8662+
MF.addInvoke(FuncInfo.getMBB(EHPadBB), BeginLabel, EndLabel);
86638663
}
86648664

86658665
return Chain;
@@ -11826,7 +11826,7 @@ SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) {
1182611826
// block.
1182711827
for (const BasicBlock *SuccBB : successors(LLVMBB->getTerminator())) {
1182811828
if (!isa<PHINode>(SuccBB->begin())) continue;
11829-
MachineBasicBlock *SuccMBB = FuncInfo.MBBMap[SuccBB];
11829+
MachineBasicBlock *SuccMBB = FuncInfo.getMBB(SuccBB);
1183011830

1183111831
// If this terminator has multiple identical successors (common for
1183211832
// switches), only handle each succ once.
@@ -12306,15 +12306,15 @@ void SelectionDAGBuilder::visitSwitch(const SwitchInst &SI) {
1230612306
CaseClusterVector Clusters;
1230712307
Clusters.reserve(SI.getNumCases());
1230812308
for (auto I : SI.cases()) {
12309-
MachineBasicBlock *Succ = FuncInfo.MBBMap[I.getCaseSuccessor()];
12309+
MachineBasicBlock *Succ = FuncInfo.getMBB(I.getCaseSuccessor());
1231012310
const ConstantInt *CaseVal = I.getCaseValue();
1231112311
BranchProbability Prob =
1231212312
BPI ? BPI->getEdgeProbability(SI.getParent(), I.getSuccessorIndex())
1231312313
: BranchProbability(1, SI.getNumCases() + 1);
1231412314
Clusters.push_back(CaseCluster::range(CaseVal, CaseVal, Succ, Prob));
1231512315
}
1231612316

12317-
MachineBasicBlock *DefaultMBB = FuncInfo.MBBMap[SI.getDefaultDest()];
12317+
MachineBasicBlock *DefaultMBB = FuncInfo.getMBB(SI.getDefaultDest());
1231812318

1231912319
// Cluster adjacent cases with the same destination. We do this at all
1232012320
// optimization levels because it's cheap to do and will make codegen faster
@@ -12368,7 +12368,7 @@ void SelectionDAGBuilder::visitSwitch(const SwitchInst &SI) {
1236812368
// Scale the branchprobability for DefaultMBB if the peel occurs and
1236912369
// DefaultMBB is not replaced.
1237012370
if (PeeledCaseProb != BranchProbability::getZero() &&
12371-
DefaultMBB == FuncInfo.MBBMap[SI.getDefaultDest()])
12371+
DefaultMBB == FuncInfo.getMBB(SI.getDefaultDest()))
1237212372
DefaultProb = scaleCaseProbality(DefaultProb, PeeledCaseProb);
1237312373
WorkList.push_back(
1237412374
{PeeledSwitchMBB, First, Last, nullptr, nullptr, DefaultProb});

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1591,7 +1591,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
15911591
++NumEntryBlocks;
15921592

15931593
// Set up FuncInfo for ISel. Entry blocks never have PHIs.
1594-
FuncInfo->MBB = FuncInfo->MBBMap[&Fn.getEntryBlock()];
1594+
FuncInfo->MBB = FuncInfo->getMBB(&Fn.getEntryBlock());
15951595
FuncInfo->InsertPt = FuncInfo->MBB->begin();
15961596

15971597
CurDAG->setFunctionLoweringInfo(FuncInfo.get());
@@ -1669,7 +1669,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
16691669
BasicBlock::const_iterator const End = LLVMBB->end();
16701670
BasicBlock::const_iterator BI = End;
16711671

1672-
FuncInfo->MBB = FuncInfo->MBBMap[LLVMBB];
1672+
FuncInfo->MBB = FuncInfo->getMBB(LLVMBB);
16731673
if (!FuncInfo->MBB)
16741674
continue; // Some blocks like catchpads have no code or MBB.
16751675

@@ -1821,7 +1821,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
18211821
if (SP->shouldEmitSDCheck(*LLVMBB)) {
18221822
bool FunctionBasedInstrumentation =
18231823
TLI->getSSPStackGuardCheck(*Fn.getParent());
1824-
SDB->SPDescriptor.initialize(LLVMBB, FuncInfo->MBBMap[LLVMBB],
1824+
SDB->SPDescriptor.initialize(LLVMBB, FuncInfo->getMBB(LLVMBB),
18251825
FunctionBasedInstrumentation);
18261826
}
18271827

‎llvm/lib/Target/AArch64/AArch64FastISel.cpp

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -597,7 +597,7 @@ bool AArch64FastISel::computeAddress(const Value *Obj, Address &Addr, Type *Ty)
597597
// Don't walk into other basic blocks unless the object is an alloca from
598598
// another block, otherwise it may not have a virtual register assigned.
599599
if (FuncInfo.StaticAllocaMap.count(static_cast<const AllocaInst *>(Obj)) ||
600-
FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB) {
600+
FuncInfo.getMBB(I->getParent()) == FuncInfo.MBB) {
601601
Opcode = I->getOpcode();
602602
U = I;
603603
}
@@ -749,7 +749,7 @@ bool AArch64FastISel::computeAddress(const Value *Obj, Address &Addr, Type *Ty)
749749

750750
const Value *Src = U->getOperand(0);
751751
if (const auto *I = dyn_cast<Instruction>(Src)) {
752-
if (FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB) {
752+
if (FuncInfo.getMBB(I->getParent()) == FuncInfo.MBB) {
753753
// Fold the zext or sext when it won't become a noop.
754754
if (const auto *ZE = dyn_cast<ZExtInst>(I)) {
755755
if (!isIntExtFree(ZE) &&
@@ -831,7 +831,7 @@ bool AArch64FastISel::computeAddress(const Value *Obj, Address &Addr, Type *Ty)
831831

832832
const Value *Src = LHS;
833833
if (const auto *I = dyn_cast<Instruction>(Src)) {
834-
if (FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB) {
834+
if (FuncInfo.getMBB(I->getParent()) == FuncInfo.MBB) {
835835
// Fold the zext or sext when it won't become a noop.
836836
if (const auto *ZE = dyn_cast<ZExtInst>(I)) {
837837
if (!isIntExtFree(ZE) &&
@@ -1027,7 +1027,7 @@ bool AArch64FastISel::isValueAvailable(const Value *V) const {
10271027
return true;
10281028

10291029
const auto *I = cast<Instruction>(V);
1030-
return FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB;
1030+
return FuncInfo.getMBB(I->getParent()) == FuncInfo.MBB;
10311031
}
10321032

10331033
bool AArch64FastISel::simplifyAddress(Address &Addr, MVT VT) {
@@ -2279,8 +2279,8 @@ bool AArch64FastISel::emitCompareAndBranch(const BranchInst *BI) {
22792279
if (BW > 64)
22802280
return false;
22812281

2282-
MachineBasicBlock *TBB = FuncInfo.MBBMap[BI->getSuccessor(0)];
2283-
MachineBasicBlock *FBB = FuncInfo.MBBMap[BI->getSuccessor(1)];
2282+
MachineBasicBlock *TBB = FuncInfo.getMBB(BI->getSuccessor(0));
2283+
MachineBasicBlock *FBB = FuncInfo.getMBB(BI->getSuccessor(1));
22842284

22852285
// Try to take advantage of fallthrough opportunities.
22862286
if (FuncInfo.MBB->isLayoutSuccessor(TBB)) {
@@ -2384,13 +2384,13 @@ bool AArch64FastISel::emitCompareAndBranch(const BranchInst *BI) {
23842384
bool AArch64FastISel::selectBranch(const Instruction *I) {
23852385
const BranchInst *BI = cast<BranchInst>(I);
23862386
if (BI->isUnconditional()) {
2387-
MachineBasicBlock *MSucc = FuncInfo.MBBMap[BI->getSuccessor(0)];
2387+
MachineBasicBlock *MSucc = FuncInfo.getMBB(BI->getSuccessor(0));
23882388
fastEmitBranch(MSucc, BI->getDebugLoc());
23892389
return true;
23902390
}
23912391

2392-
MachineBasicBlock *TBB = FuncInfo.MBBMap[BI->getSuccessor(0)];
2393-
MachineBasicBlock *FBB = FuncInfo.MBBMap[BI->getSuccessor(1)];
2392+
MachineBasicBlock *TBB = FuncInfo.getMBB(BI->getSuccessor(0));
2393+
MachineBasicBlock *FBB = FuncInfo.getMBB(BI->getSuccessor(1));
23942394

23952395
if (const CmpInst *CI = dyn_cast<CmpInst>(BI->getCondition())) {
23962396
if (CI->hasOneUse() && isValueAvailable(CI)) {
@@ -2527,7 +2527,7 @@ bool AArch64FastISel::selectIndirectBr(const Instruction *I) {
25272527

25282528
// Make sure the CFG is up-to-date.
25292529
for (const auto *Succ : BI->successors())
2530-
FuncInfo.MBB->addSuccessor(FuncInfo.MBBMap[Succ]);
2530+
FuncInfo.MBB->addSuccessor(FuncInfo.getMBB(Succ));
25312531

25322532
return true;
25332533
}

‎llvm/lib/Target/ARM/ARMFastISel.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -700,7 +700,7 @@ bool ARMFastISel::ARMComputeAddress(const Value *Obj, Address &Addr) {
700700
// Don't walk into other basic blocks unless the object is an alloca from
701701
// another block, otherwise it may not have a virtual register assigned.
702702
if (FuncInfo.StaticAllocaMap.count(static_cast<const AllocaInst *>(Obj)) ||
703-
FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB) {
703+
FuncInfo.getMBB(I->getParent()) == FuncInfo.MBB) {
704704
Opcode = I->getOpcode();
705705
U = I;
706706
}
@@ -1223,8 +1223,8 @@ static ARMCC::CondCodes getComparePred(CmpInst::Predicate Pred) {
12231223

12241224
bool ARMFastISel::SelectBranch(const Instruction *I) {
12251225
const BranchInst *BI = cast<BranchInst>(I);
1226-
MachineBasicBlock *TBB = FuncInfo.MBBMap[BI->getSuccessor(0)];
1227-
MachineBasicBlock *FBB = FuncInfo.MBBMap[BI->getSuccessor(1)];
1226+
MachineBasicBlock *TBB = FuncInfo.getMBB(BI->getSuccessor(0));
1227+
MachineBasicBlock *FBB = FuncInfo.getMBB(BI->getSuccessor(1));
12281228

12291229
// Simple branch support.
12301230

@@ -1329,7 +1329,7 @@ bool ARMFastISel::SelectIndirectBr(const Instruction *I) {
13291329

13301330
const IndirectBrInst *IB = cast<IndirectBrInst>(I);
13311331
for (const BasicBlock *SuccBB : IB->successors())
1332-
FuncInfo.MBB->addSuccessor(FuncInfo.MBBMap[SuccBB]);
1332+
FuncInfo.MBB->addSuccessor(FuncInfo.getMBB(SuccBB));
13331333

13341334
return true;
13351335
}

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