|
4 | 4 |
|
5 | 5 | ; <256 x float>
|
6 | 6 |
|
7 |
| -;; TODO v256i1 zero-mask isel |
8 |
| -;; ; Function Attrs: nounwind |
9 |
| -;; define fastcc <256 x i1> @fcmp_false_vv_v256f32(<256 x float> %x, <256 x float> %y) { |
10 |
| -;; %z = fcmp false <256 x float> %x, %y |
11 |
| -;; ret <256 x i1> %z |
12 |
| -;; } |
13 |
| -;; |
14 |
| -;; ; Function Attrs: nounwind |
15 |
| -;; define fastcc <256 x i1> @fcmp_false_sv_v256f32(float %x, <256 x float> %y) { |
16 |
| -;; %xins = insertelement <256 x float> undef, float %x, i32 0 |
17 |
| -;; %vx = shufflevector <256 x float> %xins, <256 x float> undef, <256 x i32> zeroinitializer |
18 |
| -;; %z = fcmp false <256 x float> %vx, %y |
19 |
| -;; ret <256 x i1> %z |
20 |
| -;; } |
21 |
| -;; |
22 |
| -;; ; Function Attrs: nounwind |
23 |
| -;; define fastcc <256 x i1> @fcmp_false_vs_v256f32(<256 x float> %x, float %y) { |
24 |
| -;; %yins = insertelement <256 x float> undef, float %y, i32 0 |
25 |
| -;; %vy = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer |
26 |
| -;; %z = fcmp false <256 x float> %x, %vy |
27 |
| -;; ret <256 x i1> %z |
28 |
| -;; } |
| 7 | +; Function Attrs: nounwind |
| 8 | +define fastcc <256 x i1> @fcmp_false_vv_v256f32(<256 x float> %x, <256 x float> %y) { |
| 9 | +; CHECK-LABEL: fcmp_false_vv_v256f32: |
| 10 | +; CHECK: # %bb.0: |
| 11 | +; CHECK-NEXT: xorm %vm1, %vm0, %vm0 |
| 12 | +; CHECK-NEXT: b.l.t (, %s10) |
| 13 | + %z = fcmp false <256 x float> %x, %y |
| 14 | + ret <256 x i1> %z |
| 15 | +} |
| 16 | + |
| 17 | +; Function Attrs: nounwind |
| 18 | +define fastcc <256 x i1> @fcmp_false_sv_v256f32(float %x, <256 x float> %y) { |
| 19 | +; CHECK-LABEL: fcmp_false_sv_v256f32: |
| 20 | +; CHECK: # %bb.0: |
| 21 | +; CHECK-NEXT: xorm %vm1, %vm0, %vm0 |
| 22 | +; CHECK-NEXT: b.l.t (, %s10) |
| 23 | + %xins = insertelement <256 x float> undef, float %x, i32 0 |
| 24 | + %vx = shufflevector <256 x float> %xins, <256 x float> undef, <256 x i32> zeroinitializer |
| 25 | + %z = fcmp false <256 x float> %vx, %y |
| 26 | + ret <256 x i1> %z |
| 27 | +} |
| 28 | + |
| 29 | +; Function Attrs: nounwind |
| 30 | +define fastcc <256 x i1> @fcmp_false_vs_v256f32(<256 x float> %x, float %y) { |
| 31 | +; CHECK-LABEL: fcmp_false_vs_v256f32: |
| 32 | +; CHECK: # %bb.0: |
| 33 | +; CHECK-NEXT: xorm %vm1, %vm0, %vm0 |
| 34 | +; CHECK-NEXT: b.l.t (, %s10) |
| 35 | + %yins = insertelement <256 x float> undef, float %y, i32 0 |
| 36 | + %vy = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer |
| 37 | + %z = fcmp false <256 x float> %x, %vy |
| 38 | + ret <256 x i1> %z |
| 39 | +} |
29 | 40 |
|
30 | 41 | ; Function Attrs: nounwind
|
31 | 42 | define fastcc <256 x i1> @fcmp_oeq_vv_v256f32(<256 x float> %x, <256 x float> %y) {
|
@@ -657,25 +668,36 @@ define fastcc <256 x i1> @fcmp_une_vs_v256f32(<256 x float> %x, float %y) {
|
657 | 668 | ret <256 x i1> %z
|
658 | 669 | }
|
659 | 670 |
|
660 |
| -;; TODO v256i1 all-one mask isel. |
661 |
| -;; ; Function Attrs: nounwind |
662 |
| -;; define fastcc <256 x i1> @fcmp_true_vv_v256f32(<256 x float> %x, <256 x float> %y) { |
663 |
| -;; %z = fcmp true <256 x float> %x, %y |
664 |
| -;; ret <256 x i1> %z |
665 |
| -;; } |
666 |
| -;; |
667 |
| -;; ; Function Attrs: nounwind |
668 |
| -;; define fastcc <256 x i1> @fcmp_true_sv_v256f32(float %x, <256 x float> %y) { |
669 |
| -;; %xins = insertelement <256 x float> undef, float %x, i32 0 |
670 |
| -;; %vx = shufflevector <256 x float> %xins, <256 x float> undef, <256 x i32> zeroinitializer |
671 |
| -;; %z = fcmp true <256 x float> %vx, %y |
672 |
| -;; ret <256 x i1> %z |
673 |
| -;; } |
674 |
| -;; |
675 |
| -;; ; Function Attrs: nounwind |
676 |
| -;; define fastcc <256 x i1> @fcmp_true_vs_v256f32(<256 x float> %x, float %y) { |
677 |
| -;; %yins = insertelement <256 x float> undef, float %y, i32 0 |
678 |
| -;; %vy = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer |
679 |
| -;; %z = fcmp true <256 x float> %x, %vy |
680 |
| -;; ret <256 x i1> %z |
681 |
| -;; } |
| 671 | +; Function Attrs: nounwind |
| 672 | +define fastcc <256 x i1> @fcmp_true_vv_v256f32(<256 x float> %x, <256 x float> %y) { |
| 673 | +; CHECK-LABEL: fcmp_true_vv_v256f32: |
| 674 | +; CHECK: # %bb.0: |
| 675 | +; CHECK-NEXT: andm %vm1, %vm0, %vm0 |
| 676 | +; CHECK-NEXT: b.l.t (, %s10) |
| 677 | + %z = fcmp true <256 x float> %x, %y |
| 678 | + ret <256 x i1> %z |
| 679 | +} |
| 680 | + |
| 681 | +; Function Attrs: nounwind |
| 682 | +define fastcc <256 x i1> @fcmp_true_sv_v256f32(float %x, <256 x float> %y) { |
| 683 | +; CHECK-LABEL: fcmp_true_sv_v256f32: |
| 684 | +; CHECK: # %bb.0: |
| 685 | +; CHECK-NEXT: andm %vm1, %vm0, %vm0 |
| 686 | +; CHECK-NEXT: b.l.t (, %s10) |
| 687 | + %xins = insertelement <256 x float> undef, float %x, i32 0 |
| 688 | + %vx = shufflevector <256 x float> %xins, <256 x float> undef, <256 x i32> zeroinitializer |
| 689 | + %z = fcmp true <256 x float> %vx, %y |
| 690 | + ret <256 x i1> %z |
| 691 | +} |
| 692 | + |
| 693 | +; Function Attrs: nounwind |
| 694 | +define fastcc <256 x i1> @fcmp_true_vs_v256f32(<256 x float> %x, float %y) { |
| 695 | +; CHECK-LABEL: fcmp_true_vs_v256f32: |
| 696 | +; CHECK: # %bb.0: |
| 697 | +; CHECK-NEXT: andm %vm1, %vm0, %vm0 |
| 698 | +; CHECK-NEXT: b.l.t (, %s10) |
| 699 | + %yins = insertelement <256 x float> undef, float %y, i32 0 |
| 700 | + %vy = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer |
| 701 | + %z = fcmp true <256 x float> %x, %vy |
| 702 | + ret <256 x i1> %z |
| 703 | +} |
0 commit comments