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1 | 1 | ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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2 | 2 | ; RUN: opt < %s -instcombine -S | FileCheck %s
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3 | 3 |
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4 |
| -define i64 @vscale_SExt_i32toi64() #0 { |
5 |
| -; CHECK: entry: |
6 |
| -; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
7 |
| -; CHECK-NEXT: ret i64 [[TMP0]] |
8 |
| -entry: |
9 |
| - %0 = call i32 @llvm.vscale.i32() |
10 |
| - %1 = sext i32 %0 to i64 |
11 |
| - ret i64 %1 |
12 |
| -} |
| 4 | +; |
| 5 | +; Sign-extend |
| 6 | +; |
13 | 7 |
|
14 |
| -define i32 @vscale_SExt_i8toi32() #0 { |
15 |
| -; CHECK: entry: |
| 8 | +define i32 @vscale_SExt_i8toi32() vscale_range(0, 127) { |
| 9 | +; CHECK-LABEL: @vscale_SExt_i8toi32( |
| 10 | +; CHECK-NEXT: entry: |
16 | 11 | ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
|
17 | 12 | ; CHECK-NEXT: ret i32 [[TMP0]]
|
| 13 | +; |
18 | 14 | entry:
|
19 | 15 | %0 = call i8 @llvm.vscale.i8()
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20 | 16 | %1 = sext i8 %0 to i32
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21 | 17 | ret i32 %1
|
22 | 18 | }
|
23 | 19 |
|
24 |
| - |
25 |
| -define i32 @vscale_SExt_i8toi32_poison() vscale_range(0, 192) { |
26 |
| -; CHECK: entry: |
| 20 | +define i32 @vscale_SExt_i8toi32_poison() vscale_range(0, 128) { |
| 21 | +; CHECK-LABEL: @vscale_SExt_i8toi32_poison( |
| 22 | +; CHECK-NEXT: entry: |
27 | 23 | ; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.vscale.i8()
|
28 | 24 | ; CHECK-NEXT: [[TMP1:%.*]] = sext i8 [[TMP0]] to i32
|
29 | 25 | ; CHECK-NEXT: ret i32 [[TMP1]]
|
| 26 | +; |
30 | 27 | entry:
|
31 | 28 | %0 = call i8 @llvm.vscale.i8()
|
32 | 29 | %1 = sext i8 %0 to i32
|
33 | 30 | ret i32 %1
|
34 | 31 | }
|
35 | 32 |
|
| 33 | +; |
| 34 | +; Zero-extend |
| 35 | +; |
36 | 36 |
|
37 |
| - |
38 |
| -define i64 @vscale_ZExt_i32toi64() #0 { |
39 |
| -; CHECK: entry: |
40 |
| -; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
41 |
| -; CHECK-NEXT: ret i64 [[TMP0]] |
| 37 | +define i32 @vscale_ZExt_i8toi32() vscale_range(0, 128) { |
| 38 | +; CHECK-LABEL: @vscale_ZExt_i8toi32( |
| 39 | +; CHECK-NEXT: entry: |
| 40 | +; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32() |
| 41 | +; CHECK-NEXT: ret i32 [[TMP0]] |
| 42 | +; |
42 | 43 | entry:
|
43 |
| - %0 = call i32 @llvm.vscale.i32() |
44 |
| - %1 = zext i32 %0 to i64 |
45 |
| - ret i64 %1 |
| 44 | + %0 = call i8 @llvm.vscale.i8() |
| 45 | + %1 = zext i8 %0 to i32 |
| 46 | + ret i32 %1 |
46 | 47 | }
|
47 | 48 |
|
48 |
| -define i64 @vscale_ZExt_i1toi64() vscale_range(0, 1) { |
49 |
| -; CHECK: entry: |
50 |
| -; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
51 |
| -; CHECK-NEXT: ret i64 [[TMP0]] |
52 |
| -entry: |
53 |
| - %0 = call i1 @llvm.vscale.i1() |
54 |
| - %1 = zext i1 %0 to i64 |
55 |
| - ret i64 %1 |
| 49 | +define i32 @vscale_ZExt_i8toi32_poison() vscale_range(0, 256) { |
| 50 | +; CHECK-LABEL: @vscale_ZExt_i8toi32_poison( |
| 51 | +; CHECK-NEXT: entry: |
| 52 | +; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.vscale.i8() |
| 53 | +; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[TMP0]] to i32 |
| 54 | +; CHECK-NEXT: ret i32 [[TMP1]] |
| 55 | +; |
| 56 | + entry: |
| 57 | + %0 = call i8 @llvm.vscale.i8() |
| 58 | + %1 = zext i8 %0 to i32 |
| 59 | + ret i32 %1 |
56 | 60 | }
|
57 | 61 |
|
58 |
| -define i32 @vscale_ZExt_i8toi32_poison() vscale_range(0, 1024) { |
59 |
| -; CHECK: entry: |
| 62 | +; |
| 63 | +; No vscale_range attribute |
| 64 | +; |
| 65 | + |
| 66 | +define i32 @vscale_ZExt_i8toi32_unknown() { |
| 67 | +; CHECK-LABEL: @vscale_ZExt_i8toi32_unknown( |
| 68 | +; CHECK-NEXT: entry: |
60 | 69 | ; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.vscale.i8()
|
61 | 70 | ; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[TMP0]] to i32
|
62 | 71 | ; CHECK-NEXT: ret i32 [[TMP1]]
|
| 72 | +; |
63 | 73 | entry:
|
64 | 74 | %0 = call i8 @llvm.vscale.i8()
|
65 | 75 | %1 = zext i8 %0 to i32
|
66 | 76 | ret i32 %1
|
67 | 77 | }
|
68 | 78 |
|
69 |
| -define i32 @vscale_ZExt_i16toi32_unknown() { |
70 |
| -; CHECK: entry: |
71 |
| -; CHECK-NEXT: [[TMP0:%.*]] = call i16 @llvm.vscale.i16() |
72 |
| -; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[TMP0]] to i32 |
| 79 | +; |
| 80 | +; unbounded vscale_range maximum (0) |
| 81 | +; |
| 82 | + |
| 83 | +define i32 @vscale_SExt_i8toi32_unbounded() vscale_range(0, 0) { |
| 84 | +; CHECK-LABEL: @vscale_SExt_i8toi32_unbounded( |
| 85 | +; CHECK-NEXT: entry: |
| 86 | +; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.vscale.i8() |
| 87 | +; CHECK-NEXT: [[TMP1:%.*]] = sext i8 [[TMP0]] to i32 |
73 | 88 | ; CHECK-NEXT: ret i32 [[TMP1]]
|
| 89 | +; |
74 | 90 | entry:
|
75 |
| - %0 = call i16 @llvm.vscale.i16() |
76 |
| - %1 = zext i16 %0 to i32 |
| 91 | + %0 = call i8 @llvm.vscale.i8() |
| 92 | + %1 = sext i8 %0 to i32 |
77 | 93 | ret i32 %1
|
78 | 94 | }
|
79 | 95 |
|
80 |
| -attributes #0 = { vscale_range(0, 16) } |
| 96 | +define i32 @vscale_ZExt_i8toi32_unbounded() vscale_range(0, 0) { |
| 97 | +; CHECK-LABEL: @vscale_ZExt_i8toi32_unbounded( |
| 98 | +; CHECK-NEXT: entry: |
| 99 | +; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.vscale.i8() |
| 100 | +; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[TMP0]] to i32 |
| 101 | +; CHECK-NEXT: ret i32 [[TMP1]] |
| 102 | +; |
| 103 | + entry: |
| 104 | + %0 = call i8 @llvm.vscale.i8() |
| 105 | + %1 = zext i8 %0 to i32 |
| 106 | + ret i32 %1 |
| 107 | +} |
81 | 108 |
|
82 |
| -declare i1 @llvm.vscale.i1() |
83 | 109 | declare i8 @llvm.vscale.i8()
|
84 |
| -declare i16 @llvm.vscale.i16() |
85 |
| -declare i32 @llvm.vscale.i32() |
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