ARM: constrain Thumb LDRLIT pseudo-instructions to r0-r7.

Previously we only used GPR for the destination placeholder in "ldr rD, [pc,
incorrect codegen under the integrated assembler.

This should fix both issues (which probably only affect MachO targets at the
moment).

rdar://problem/15800156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199108 91177308-0d34-0410-b5e6-96231b3b80d8

Author: TNorthover

lib/Target/ARM/ARMInstrThumb.td

@@ -1312,14 +1312,15 @@ def : T1Pat<(subc   tGPR:$lhs, tGPR:$rhs),
 def : T1Pat<(ARMWrapper  tconstpool  :$dst), (tLEApcrel tconstpool  :$dst)>;
 
 // GlobalAddress
-def tLDRLIT_ga_pcrel : PseudoInst<(outs GPR:$dst), (ins i32imm:$addr),
+def tLDRLIT_ga_pcrel : PseudoInst<(outs tGPR:$dst), (ins i32imm:$addr),
                                   IIC_iLoadiALU,
-                                  [(set GPR:$dst,
+                                  [(set tGPR:$dst,
                                         (ARMWrapperPIC tglobaladdr:$addr))]>,
                        Requires<[IsThumb, DontUseMovt]>;
 
-def tLDRLIT_ga_abs : PseudoInst<(outs GPR:$dst), (ins i32imm:$src), IIC_iLoad_i,
-                                [(set GPR:$dst,
+def tLDRLIT_ga_abs : PseudoInst<(outs tGPR:$dst), (ins i32imm:$src),
+                                IIC_iLoad_i,
+                                [(set tGPR:$dst,
                                       (ARMWrapper tglobaladdr:$src))]>,
                      Requires<[IsThumb, DontUseMovt]>;