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Commit 7e40983

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author
Matheus Almeida
committed
[mips] Implementation of dli.
 Patch by David Chisnall His work was sponsored by: DARPA, AFRL Some small modifications to the original patch: we now error if it's not possible to expand an instruction (mips-expansions-bad.s has some examples). Added some comments to the expansions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211271 91177308-0d34-0410-b5e6-96231b3b80d8
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‎lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Lines changed: 90 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -984,6 +984,7 @@ bool MipsAsmParser::needsExpansion(MCInst &Inst) {
984984
case Mips::LoadImm32Reg:
985985
case Mips::LoadAddr32Imm:
986986
case Mips::LoadAddr32Reg:
987+
case Mips::LoadImm64Reg:
987988
return true;
988989
default:
989990
return false;
@@ -997,13 +998,43 @@ bool MipsAsmParser::expandInstruction(MCInst &Inst, SMLoc IDLoc,
997998
return true;
998999
case Mips::LoadImm32Reg:
9991000
return expandLoadImm(Inst, IDLoc, Instructions);
1001+
case Mips::LoadImm64Reg:
1002+
if (!isGP64()) {
1003+
Error(IDLoc, "instruction requires a CPU feature not currently enabled");
1004+
return true;
1005+
}
1006+
return expandLoadImm(Inst, IDLoc, Instructions);
10001007
case Mips::LoadAddr32Imm:
10011008
return expandLoadAddressImm(Inst, IDLoc, Instructions);
10021009
case Mips::LoadAddr32Reg:
10031010
return expandLoadAddressReg(Inst, IDLoc, Instructions);
10041011
}
10051012
}
10061013

1014+
namespace {
1015+
template <int Shift, bool PerformShift>
1016+
void createShiftOr(int64_t Value, unsigned RegNo, SMLoc IDLoc,
1017+
SmallVectorImpl<MCInst> &Instructions) {
1018+
MCInst tmpInst;
1019+
if (PerformShift) {
1020+
tmpInst.setOpcode(Mips::DSLL);
1021+
tmpInst.addOperand(MCOperand::CreateReg(RegNo));
1022+
tmpInst.addOperand(MCOperand::CreateReg(RegNo));
1023+
tmpInst.addOperand(MCOperand::CreateImm(16));
1024+
tmpInst.setLoc(IDLoc);
1025+
Instructions.push_back(tmpInst);
1026+
tmpInst.clear();
1027+
}
1028+
tmpInst.setOpcode(Mips::ORi);
1029+
tmpInst.addOperand(MCOperand::CreateReg(RegNo));
1030+
tmpInst.addOperand(MCOperand::CreateReg(RegNo));
1031+
tmpInst.addOperand(
1032+
MCOperand::CreateImm(((Value & (0xffffLL << Shift)) >> Shift)));
1033+
tmpInst.setLoc(IDLoc);
1034+
Instructions.push_back(tmpInst);
1035+
}
1036+
}
1037+
10071038
bool MipsAsmParser::expandLoadImm(MCInst &Inst, SMLoc IDLoc,
10081039
SmallVectorImpl<MCInst> &Instructions) {
10091040
MCInst tmpInst;
@@ -1012,8 +1043,10 @@ bool MipsAsmParser::expandLoadImm(MCInst &Inst, SMLoc IDLoc,
10121043
const MCOperand &RegOp = Inst.getOperand(0);
10131044
assert(RegOp.isReg() && "expected register operand kind");
10141045

1015-
int ImmValue = ImmOp.getImm();
1046+
int64_t ImmValue = ImmOp.getImm();
10161047
tmpInst.setLoc(IDLoc);
1048+
// FIXME: gas has a special case for values that are 000...1111, which
1049+
// becomes a li -1 and then a dsrl
10171050
if (0 <= ImmValue && ImmValue <= 65535) {
10181051
// For 0 <= j <= 65535.
10191052
// li d,j => ori d,$zero,j
@@ -1030,21 +1063,71 @@ bool MipsAsmParser::expandLoadImm(MCInst &Inst, SMLoc IDLoc,
10301063
tmpInst.addOperand(MCOperand::CreateReg(Mips::ZERO));
10311064
tmpInst.addOperand(MCOperand::CreateImm(ImmValue));
10321065
Instructions.push_back(tmpInst);
1033-
} else {
1034-
// For any other value of j that is representable as a 32-bit integer.
1066+
} else if ((ImmValue & 0xffffffff) == ImmValue) {
1067+
// For any value of j that is representable as a 32-bit integer, create
1068+
// a sequence of:
10351069
// li d,j => lui d,hi16(j)
10361070
// ori d,d,lo16(j)
10371071
tmpInst.setOpcode(Mips::LUi);
10381072
tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));
10391073
tmpInst.addOperand(MCOperand::CreateImm((ImmValue & 0xffff0000) >> 16));
10401074
Instructions.push_back(tmpInst);
1041-
tmpInst.clear();
1042-
tmpInst.setOpcode(Mips::ORi);
1075+
createShiftOr<0, false>(ImmValue, RegOp.getReg(), IDLoc, Instructions);
1076+
} else if ((ImmValue & (0xffffLL << 48)) == 0) {
1077+
if (!isGP64()) {
1078+
Error (IDLoc, "instruction requires a CPU feature not currently enabled");
1079+
return true;
1080+
}
1081+
1082+
// <------- lo32 ------>
1083+
// <------- hi32 ------>
1084+
// <- hi16 -> <- lo16 ->
1085+
// _________________________________
1086+
// | | | |
1087+
// | 16-bytes | 16-bytes | 16-bytes |
1088+
// |__________|__________|__________|
1089+
//
1090+
// For any value of j that is representable as a 48-bit integer, create
1091+
// a sequence of:
1092+
// li d,j => lui d,hi16(j)
1093+
// ori d,d,hi16(lo32(j))
1094+
// dsll d,d,16
1095+
// ori d,d,lo16(lo32(j))
1096+
tmpInst.setOpcode(Mips::LUi);
10431097
tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));
1098+
tmpInst.addOperand(
1099+
MCOperand::CreateImm((ImmValue & (0xffffLL << 32)) >> 32));
1100+
Instructions.push_back(tmpInst);
1101+
createShiftOr<16, false>(ImmValue, RegOp.getReg(), IDLoc, Instructions);
1102+
createShiftOr<0, true>(ImmValue, RegOp.getReg(), IDLoc, Instructions);
1103+
} else {
1104+
if (!isGP64()) {
1105+
Error (IDLoc, "instruction requires a CPU feature not currently enabled");
1106+
return true;
1107+
}
1108+
1109+
// <------- hi32 ------> <------- lo32 ------>
1110+
// <- hi16 -> <- lo16 ->
1111+
// ___________________________________________
1112+
// | | | | |
1113+
// | 16-bytes | 16-bytes | 16-bytes | 16-bytes |
1114+
// |__________|__________|__________|__________|
1115+
//
1116+
// For any value of j that isn't representable as a 48-bit integer.
1117+
// li d,j => lui d,hi16(j)
1118+
// ori d,d,lo16(hi32(j))
1119+
// dsll d,d,16
1120+
// ori d,d,hi16(lo32(j))
1121+
// dsll d,d,16
1122+
// ori d,d,lo16(lo32(j))
1123+
tmpInst.setOpcode(Mips::LUi);
10441124
tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));
1045-
tmpInst.addOperand(MCOperand::CreateImm(ImmValue & 0xffff));
1046-
tmpInst.setLoc(IDLoc);
1125+
tmpInst.addOperand(
1126+
MCOperand::CreateImm((ImmValue & (0xffffLL << 48)) >> 48));
10471127
Instructions.push_back(tmpInst);
1128+
createShiftOr<32, false>(ImmValue, RegOp.getReg(), IDLoc, Instructions);
1129+
createShiftOr<16, true>(ImmValue, RegOp.getReg(), IDLoc, Instructions);
1130+
createShiftOr<0, true>(ImmValue, RegOp.getReg(), IDLoc, Instructions);
10481131
}
10491132
return false;
10501133
}

‎lib/Target/Mips/Mips64InstrInfo.td

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,8 @@ def uimm16_64 : Operand<i64> {
2323
// Signed Operand
2424
def simm10_64 : Operand<i64>;
2525

26+
def imm64: Operand<i64>;
27+
2628
// Transformation Function - get Imm - 32.
2729
def Subtract32 : SDNodeXForm<imm, [{
2830
return getImm(N, (unsigned)N->getZExtValue() - 32);
@@ -486,6 +488,11 @@ def : MipsInstAlias<"dsrl $rd, $rt, $rs",
486488
(DSRLV GPR64Opnd:$rd, GPR64Opnd:$rt, GPR32Opnd:$rs), 0>,
487489
ISA_MIPS3;
488490

491+
class LoadImm64< string instr_asm, Operand Od, RegisterOperand RO> :
492+
MipsAsmPseudoInst<(outs RO:$rt), (ins Od:$imm64),
493+
!strconcat(instr_asm, "\t$rt, $imm64")> ;
494+
def LoadImm64Reg : LoadImm64<"dli", imm64, GPR64Opnd>;
495+
489496
/// Move between CPU and coprocessor registers
490497
let DecoderNamespace = "Mips64", Predicates = [HasMips64] in {
491498
def DMFC0 : MFC3OP<"dmfc0", GPR64Opnd>, MFC3OP_FM<0x10, 1>;

‎test/MC/Mips/mips-expansions-bad.s

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1
2+
# RUN: FileCheck %s < %t1
3+
4+
.text
5+
li $5, 0x100000000 # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
6+
dli $5, 1 # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled

‎test/MC/Mips/mips64-expansions.s

Lines changed: 209 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,209 @@
1+
# RUN: llvm-mc %s -triple=mips64el-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
2+
#
3+
# The GNU assembler implements 'dli' and 'dla' variants on 'li' and 'la'
4+
# supporting double-word lengths. Test that not only are they present, bu
5+
# that they also seem to handle 64-bit values.
6+
#
7+
# XXXRW: Does using powers of ten make me a bad person?
8+
#
9+
# CHECK: ori $12, $zero, 1 # encoding: [0x01,0x00,0x0c,0x34]
10+
# CHECK: ori $12, $zero, 10 # encoding: [0x0a,0x00,0x0c,0x34]
11+
# CHECK: ori $12, $zero, 100 # encoding: [0x64,0x00,0x0c,0x34]
12+
# CHECK: ori $12, $zero, 1000 # encoding: [0xe8,0x03,0x0c,0x34]
13+
# CHECK: ori $12, $zero, 10000 # encoding: [0x10,0x27,0x0c,0x34]
14+
# CHECK: lui $12, 1 # encoding: [0x01,0x00,0x0c,0x3c]
15+
# CHECK: ori $12, $12, 34464 # encoding: [0xa0,0x86,0x8c,0x35]
16+
# CHECK: lui $12, 15 # encoding: [0x0f,0x00,0x0c,0x3c]
17+
# CHECK: ori $12, $12, 16960 # encoding: [0x40,0x42,0x8c,0x35]
18+
# CHECK: lui $12, 152 # encoding: [0x98,0x00,0x0c,0x3c]
19+
# CHECK: ori $12, $12, 38528 # encoding: [0x80,0x96,0x8c,0x35]
20+
# CHECK: lui $12, 1525 # encoding: [0xf5,0x05,0x0c,0x3c]
21+
# CHECK: ori $12, $12, 57600 # encoding: [0x00,0xe1,0x8c,0x35]
22+
# CHECK: lui $12, 15258 # encoding: [0x9a,0x3b,0x0c,0x3c]
23+
# CHECK: ori $12, $12, 51712 # encoding: [0x00,0xca,0x8c,0x35]
24+
# CHECK: lui $12, 2 # encoding: [0x02,0x00,0x0c,0x3c]
25+
# CHECK: ori $12, $12, 21515 # encoding: [0x0b,0x54,0x8c,0x35]
26+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
27+
# CHECK: ori $12, $12, 58368 # encoding: [0x00,0xe4,0x8c,0x35]
28+
# CHECK: lui $12, 23 # encoding: [0x17,0x00,0x0c,0x3c]
29+
# CHECK: ori $12, $12, 18550 # encoding: [0x76,0x48,0x8c,0x35]
30+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
31+
# CHECK: ori $12, $12, 59392 # encoding: [0x00,0xe8,0x8c,0x35]
32+
# CHECK: lui $12, 232 # encoding: [0xe8,0x00,0x0c,0x3c]
33+
# CHECK: ori $12, $12, 54437 # encoding: [0xa5,0xd4,0x8c,0x35]
34+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
35+
# CHECK: ori $12, $12, 4096 # encoding: [0x00,0x10,0x8c,0x35]
36+
# CHECK: lui $12, 2328 # encoding: [0x18,0x09,0x0c,0x3c]
37+
# CHECK: ori $12, $12, 20082 # encoding: [0x72,0x4e,0x8c,0x35]
38+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
39+
# CHECK: ori $12, $12, 40960 # encoding: [0x00,0xa0,0x8c,0x35]
40+
# CHECK: lui $12, 23283 # encoding: [0xf3,0x5a,0x0c,0x3c]
41+
# CHECK: ori $12, $12, 4218 # encoding: [0x7a,0x10,0x8c,0x35]
42+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
43+
# CHECK: ori $12, $12, 16384 # encoding: [0x00,0x40,0x8c,0x35]
44+
# CHECK: lui $12, 3 # encoding: [0x03,0x00,0x0c,0x3c]
45+
# CHECK: ori $12, $12, 36222 # encoding: [0x7e,0x8d,0x8c,0x35]
46+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
47+
# CHECK: ori $12, $12, 42182 # encoding: [0xc6,0xa4,0x8c,0x35]
48+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
49+
# CHECK: ori $12, $12, 32768 # encoding: [0x00,0x80,0x8c,0x35]
50+
# CHECK: lui $12, 35 # encoding: [0x23,0x00,0x0c,0x3c]
51+
# CHECK: ori $12, $12, 34546 # encoding: [0xf2,0x86,0x8c,0x35]
52+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
53+
# CHECK: ori $12, $12, 28609 # encoding: [0xc1,0x6f,0x8c,0x35]
54+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
55+
# CHECK: ori $12, $12, 0 # encoding: [0x00,0x00,0x8c,0x35]
56+
# CHECK: lui $12, 355 # encoding: [0x63,0x01,0x0c,0x3c]
57+
# CHECK: ori $12, $12, 17784 # encoding: [0x78,0x45,0x8c,0x35]
58+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
59+
# CHECK: ori $12, $12, 23946 # encoding: [0x8a,0x5d,0x8c,0x35]
60+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
61+
# CHECK: ori $12, $12, 0 # encoding: [0x00,0x00,0x8c,0x35]
62+
# CHECK: lui $12, 3552 # encoding: [0xe0,0x0d,0x0c,0x3c]
63+
# CHECK: ori $12, $12, 46771 # encoding: [0xb3,0xb6,0x8c,0x35]
64+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
65+
# CHECK: ori $12, $12, 42852 # encoding: [0x64,0xa7,0x8c,0x35]
66+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
67+
# CHECK: ori $12, $12, 0 # encoding: [0x00,0x00,0x8c,0x35]
68+
# CHECK: lui $12, 35527 # encoding: [0xc7,0x8a,0x0c,0x3c]
69+
# CHECK: ori $12, $12, 8964 # encoding: [0x04,0x23,0x8c,0x35]
70+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
71+
# CHECK: ori $12, $12, 35304 # encoding: [0xe8,0x89,0x8c,0x35]
72+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
73+
# CHECK: ori $12, $12, 0 # encoding: [0x00,0x00,0x8c,0x35]
74+
# CHECK: addiu $12, $zero, -1 # encoding: [0xff,0xff,0x0c,0x24]
75+
# CHECK: addiu $12, $zero, -10 # encoding: [0xf6,0xff,0x0c,0x24]
76+
# CHECK: addiu $12, $zero, -100 # encoding: [0x9c,0xff,0x0c,0x24]
77+
# CHECK: addiu $12, $zero, -1000 # encoding: [0x18,0xfc,0x0c,0x24]
78+
# CHECK: addiu $12, $zero, -10000 # encoding: [0xf0,0xd8,0x0c,0x24]
79+
# CHECK: lui $12, 65535 # encoding: [0xff,0xff,0x0c,0x3c]
80+
# CHECK: ori $12, $12, 65535 # encoding: [0xff,0xff,0x8c,0x35]
81+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
82+
# CHECK: ori $12, $12, 65534 # encoding: [0xfe,0xff,0x8c,0x35]
83+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
84+
# CHECK: ori $12, $12, 31072 # encoding: [0x60,0x79,0x8c,0x35]
85+
# CHECK: lui $12, 65535 # encoding: [0xff,0xff,0x0c,0x3c]
86+
# CHECK: ori $12, $12, 65535 # encoding: [0xff,0xff,0x8c,0x35]
87+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
88+
# CHECK: ori $12, $12, 65520 # encoding: [0xf0,0xff,0x8c,0x35]
89+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
90+
# CHECK: ori $12, $12, 48576 # encoding: [0xc0,0xbd,0x8c,0x35]
91+
# CHECK: lui $12, 65535 # encoding: [0xff,0xff,0x0c,0x3c]
92+
# CHECK: ori $12, $12, 65535 # encoding: [0xff,0xff,0x8c,0x35]
93+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
94+
# CHECK: ori $12, $12, 65383 # encoding: [0x67,0xff,0x8c,0x35]
95+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
96+
# CHECK: ori $12, $12, 27008 # encoding: [0x80,0x69,0x8c,0x35]
97+
# CHECK: lui $12, 65535 # encoding: [0xff,0xff,0x0c,0x3c]
98+
# CHECK: ori $12, $12, 65535 # encoding: [0xff,0xff,0x8c,0x35]
99+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
100+
# CHECK: ori $12, $12, 64010 # encoding: [0x0a,0xfa,0x8c,0x35]
101+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
102+
# CHECK: ori $12, $12, 7936 # encoding: [0x00,0x1f,0x8c,0x35]
103+
# CHECK: lui $12, 65535 # encoding: [0xff,0xff,0x0c,0x3c]
104+
# CHECK: ori $12, $12, 65535 # encoding: [0xff,0xff,0x8c,0x35]
105+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
106+
# CHECK: ori $12, $12, 50277 # encoding: [0x65,0xc4,0x8c,0x35]
107+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
108+
# CHECK: ori $12, $12, 13824 # encoding: [0x00,0x36,0x8c,0x35]
109+
# CHECK: lui $12, 65535 # encoding: [0xff,0xff,0x0c,0x3c]
110+
# CHECK: ori $12, $12, 65533 # encoding: [0xfd,0xff,0x8c,0x35]
111+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
112+
# CHECK: ori $12, $12, 44020 # encoding: [0xf4,0xab,0x8c,0x35]
113+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
114+
# CHECK: ori $12, $12, 7168 # encoding: [0x00,0x1c,0x8c,0x35]
115+
# CHECK: lui $12, 65535 # encoding: [0xff,0xff,0x0c,0x3c]
116+
# CHECK: ori $12, $12, 65512 # encoding: [0xe8,0xff,0x8c,0x35]
117+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
118+
# CHECK: ori $12, $12, 46985 # encoding: [0x89,0xb7,0x8c,0x35]
119+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
120+
# CHECK: ori $12, $12, 6144 # encoding: [0x00,0x18,0x8c,0x35]
121+
# CHECK: lui $12, 65535 # encoding: [0xff,0xff,0x0c,0x3c]
122+
# CHECK: ori $12, $12, 65303 # encoding: [0x17,0xff,0x8c,0x35]
123+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
124+
# CHECK: ori $12, $12, 11098 # encoding: [0x5a,0x2b,0x8c,0x35]
125+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
126+
# CHECK: ori $12, $12, 61440 # encoding: [0x00,0xf0,0x8c,0x35]
127+
# CHECK: lui $12, 65535 # encoding: [0xff,0xff,0x0c,0x3c]
128+
# CHECK: ori $12, $12, 63207 # encoding: [0xe7,0xf6,0x8c,0x35]
129+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
130+
# CHECK: ori $12, $12, 45453 # encoding: [0x8d,0xb1,0x8c,0x35]
131+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
132+
# CHECK: ori $12, $12, 24576 # encoding: [0x00,0x60,0x8c,0x35]
133+
# CHECK: lui $12, 65535 # encoding: [0xff,0xff,0x0c,0x3c]
134+
# CHECK: ori $12, $12, 42252 # encoding: [0x0c,0xa5,0x8c,0x35]
135+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
136+
# CHECK: ori $12, $12, 61317 # encoding: [0x85,0xef,0x8c,0x35]
137+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
138+
# CHECK: ori $12, $12, 49152 # encoding: [0x00,0xc0,0x8c,0x35]
139+
# CHECK: lui $12, 65532 # encoding: [0xfc,0xff,0x0c,0x3c]
140+
# CHECK: ori $12, $12, 29313 # encoding: [0x81,0x72,0x8c,0x35]
141+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
142+
# CHECK: ori $12, $12, 23353 # encoding: [0x39,0x5b,0x8c,0x35]
143+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
144+
# CHECK: ori $12, $12, 32768 # encoding: [0x00,0x80,0x8c,0x35]
145+
# CHECK: lui $12, 65500 # encoding: [0xdc,0xff,0x0c,0x3c]
146+
# CHECK: ori $12, $12, 30989 # encoding: [0x0d,0x79,0x8c,0x35]
147+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
148+
# CHECK: ori $12, $12, 36927 # encoding: [0x3f,0x90,0x8c,0x35]
149+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
150+
# CHECK: ori $12, $12, 0 # encoding: [0x00,0x00,0x8c,0x35]
151+
# CHECK: lui $12, 65180 # encoding: [0x9c,0xfe,0x0c,0x3c]
152+
# CHECK: ori $12, $12, 47751 # encoding: [0x87,0xba,0x8c,0x35]
153+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
154+
# CHECK: ori $12, $12, 41590 # encoding: [0x76,0xa2,0x8c,0x35]
155+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
156+
# CHECK: ori $12, $12, 0 # encoding: [0x00,0x00,0x8c,0x35]
157+
# CHECK: lui $12, 61983 # encoding: [0x1f,0xf2,0x0c,0x3c]
158+
# CHECK: ori $12, $12, 18764 # encoding: [0x4c,0x49,0x8c,0x35]
159+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
160+
# CHECK: ori $12, $12, 22684 # encoding: [0x9c,0x58,0x8c,0x35]
161+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
162+
# CHECK: ori $12, $12, 0 # encoding: [0x00,0x00,0x8c,0x35]
163+
# CHECK: lui $12, 30008 # encoding: [0x38,0x75,0x0c,0x3c]
164+
# CHECK: ori $12, $12, 56571 # encoding: [0xfb,0xdc,0x8c,0x35]
165+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
166+
# CHECK: ori $12, $12, 30232 # encoding: [0x18,0x76,0x8c,0x35]
167+
# CHECK: dsll $12, $12, 16 # encoding: [0x38,0x64,0x0c,0x00]
168+
# CHECK: ori $12, $12, 0 # encoding: [0x00,0x00,0x8c,0x35]
169+
170+
dli $t0, 1
171+
dli $t0, 10
172+
dli $t0, 100
173+
dli $t0, 1000
174+
dli $t0, 10000
175+
dli $t0, 100000
176+
dli $t0, 1000000
177+
dli $t0, 10000000
178+
dli $t0, 100000000
179+
dli $t0, 1000000000
180+
dli $t0, 10000000000
181+
dli $t0, 100000000000
182+
dli $t0, 1000000000000
183+
dli $t0, 10000000000000
184+
dli $t0, 100000000000000
185+
dli $t0, 1000000000000000
186+
dli $t0, 10000000000000000
187+
dli $t0, 100000000000000000
188+
dli $t0, 1000000000000000000
189+
dli $t0, 10000000000000000000
190+
dli $t0, -1
191+
dli $t0, -10
192+
dli $t0, -100
193+
dli $t0, -1000
194+
dli $t0, -10000
195+
dli $t0, -100000
196+
dli $t0, -1000000
197+
dli $t0, -10000000
198+
dli $t0, -100000000
199+
dli $t0, -1000000000
200+
dli $t0, -10000000000
201+
dli $t0, -100000000000
202+
dli $t0, -1000000000000
203+
dli $t0, -10000000000000
204+
dli $t0, -100000000000000
205+
dli $t0, -1000000000000000
206+
dli $t0, -10000000000000000
207+
dli $t0, -100000000000000000
208+
dli $t0, -1000000000000000000
209+
dli $t0, -10000000000000000000

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