Revert "ARM: switch armv7em triple to hard-float defaults and libcalls."

TNorthover · TNorthover · commit f7eb2f0fcb78 · 2018-07-18T21:32:49.000Z
This reverts commit r337385 until it can be targeted at MachO only. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337424 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h
@@ -66,7 +66,6 @@ class ARMBaseTargetMachine : public LLVMTargetMachine {
     return TargetTriple.getEnvironment() == Triple::GNUEABIHF ||
            TargetTriple.getEnvironment() == Triple::MuslEABIHF ||
            TargetTriple.getEnvironment() == Triple::EABIHF ||
-           TargetTriple.getSubArch() == Triple::ARMSubArch_v7em ||
            TargetTriple.isOSWindows() ||
            TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16;
   }
diff --git a/test/CodeGen/ARM/darwin-eabi.ll b/test/CodeGen/ARM/darwin-eabi.ll
@@ -20,5 +20,5 @@ define double @double_op(double %lhs, double %rhs) {
 ; CHECK-M3: bl ___adddf3
 
 ; CHECK-M4-LABEL: double_op:
-; CHECK-M4: {{(bl|blx|b.w)}} ___adddf3
+; CHECK-M4: {{(blx|b.w)}} ___adddf3
 }
diff --git a/test/CodeGen/ARM/macho-embedded-float.ll b/test/CodeGen/ARM/macho-embedded-float.ll

Original file line number	Diff line number	Diff line change
`@@ -66,7 +66,6 @@ class ARMBaseTargetMachine : public LLVMTargetMachine {`
`66`	`66`	`return TargetTriple.getEnvironment() == Triple::GNUEABIHF \|\|`
`67`	`67`	`TargetTriple.getEnvironment() == Triple::MuslEABIHF \|\|`
`68`	`68`	`TargetTriple.getEnvironment() == Triple::EABIHF \|\|`
`69`		`- TargetTriple.getSubArch() == Triple::ARMSubArch_v7em \|\|`
`70`	`69`	`TargetTriple.isOSWindows() \|\|`
`71`	`70`	`TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16;`
`72`	`71`	`}`
Original file line number	Diff line number	Diff line change
`@@ -20,5 +20,5 @@ define double @double_op(double %lhs, double %rhs) {`
`20`	`20`	`; CHECK-M3: bl ___adddf3`
`21`	`21`
`22`	`22`	`; CHECK-M4-LABEL: double_op:`
`23`		`-; CHECK-M4: {{(bl\|blx\|b.w)}} ___adddf3`
	`23`	`+; CHECK-M4: {{(blx\|b.w)}} ___adddf3`
`24`	`24`	`}`