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JamesbarfordAmanieu
Jamesbarford
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Amanieu
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feat - FEAT_FAMINMAX neon intrinsics
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‎library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs

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@@ -821,6 +821,114 @@ pub fn vaddvq_u64(a: uint64x2_t) -> u64 {
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}
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unsafe { _vaddvq_u64(a) }
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}
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#[doc = "Multi-vector floating-point absolute maximum"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamax_f32)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[target_feature(enable = "neon,faminmax")]
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#[cfg_attr(test, assert_instr(famax))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub unsafe fn vamax_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.famax.v2f32"
837+
)]
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fn _vamax_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t;
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}
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_vamax_f32(a, b)
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}
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#[doc = "Multi-vector floating-point absolute maximum"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamaxq_f32)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[target_feature(enable = "neon,faminmax")]
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#[cfg_attr(test, assert_instr(famax))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub unsafe fn vamaxq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.famax.v4f32"
855+
)]
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fn _vamaxq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t;
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}
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_vamaxq_f32(a, b)
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}
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#[doc = "Multi-vector floating-point absolute maximum"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamaxq_f64)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[target_feature(enable = "neon,faminmax")]
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#[cfg_attr(test, assert_instr(famax))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub unsafe fn vamaxq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
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unsafe extern "unadjusted" {
870+
#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.famax.v2f64"
873+
)]
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fn _vamaxq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t;
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}
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_vamaxq_f64(a, b)
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}
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#[doc = "Multi-vector floating-point absolute minimum"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamin_f32)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[target_feature(enable = "neon,faminmax")]
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#[cfg_attr(test, assert_instr(famin))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub unsafe fn vamin_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
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unsafe extern "unadjusted" {
888+
#[cfg_attr(
889+
any(target_arch = "aarch64", target_arch = "arm64ec"),
890+
link_name = "llvm.aarch64.neon.famin.v2f32"
891+
)]
892+
fn _vamin_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t;
893+
}
894+
_vamin_f32(a, b)
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}
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#[doc = "Multi-vector floating-point absolute minimum"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaminq_f32)"]
898+
#[doc = "## Safety"]
899+
#[doc = " * Neon instrinsic unsafe"]
900+
#[inline]
901+
#[target_feature(enable = "neon,faminmax")]
902+
#[cfg_attr(test, assert_instr(famin))]
903+
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
904+
pub unsafe fn vaminq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
905+
unsafe extern "unadjusted" {
906+
#[cfg_attr(
907+
any(target_arch = "aarch64", target_arch = "arm64ec"),
908+
link_name = "llvm.aarch64.neon.famin.v4f32"
909+
)]
910+
fn _vaminq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t;
911+
}
912+
_vaminq_f32(a, b)
913+
}
914+
#[doc = "Multi-vector floating-point absolute minimum"]
915+
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaminq_f64)"]
916+
#[doc = "## Safety"]
917+
#[doc = " * Neon instrinsic unsafe"]
918+
#[inline]
919+
#[target_feature(enable = "neon,faminmax")]
920+
#[cfg_attr(test, assert_instr(famin))]
921+
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
922+
pub unsafe fn vaminq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
923+
unsafe extern "unadjusted" {
924+
#[cfg_attr(
925+
any(target_arch = "aarch64", target_arch = "arm64ec"),
926+
link_name = "llvm.aarch64.neon.famin.v2f64"
927+
)]
928+
fn _vaminq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t;
929+
}
930+
_vaminq_f64(a, b)
931+
}
824932
#[doc = "Bit clear and exclusive OR"]
825933
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbcaxq_s8)"]
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#[inline]

‎library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml

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@@ -13973,3 +13973,45 @@ intrinsics:
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- - r
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- a
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- FnCall: ["vdup{neon_type[1].N}", [{FnCall: [simd_extract!, [b, 'LANE as u32']]}]]
13976+
13977+
- name: "vamax{neon_type.no}"
13978+
doc: "Multi-vector floating-point absolute maximum"
13979+
arguments: ["a: {neon_type}", "b: {neon_type}"]
13980+
return_type: "{neon_type}"
13981+
attr:
13982+
- FnCall: [target_feature, ['enable = "neon,faminmax"']]
13983+
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [famax]]}]]
13984+
- FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]
13985+
safety:
13986+
unsafe: [neon]
13987+
types:
13988+
- float32x2_t
13989+
- float32x4_t
13990+
- float64x2_t
13991+
compose:
13992+
- LLVMLink:
13993+
name: "_vamax{neon_type.no}"
13994+
links:
13995+
- link: "llvm.aarch64.neon.famax.{neon_type}"
13996+
arch: aarch64,arm64ec
13997+
13998+
- name: "vamin{neon_type.no}"
13999+
doc: "Multi-vector floating-point absolute minimum"
14000+
arguments: ["a: {neon_type}", "b: {neon_type}"]
14001+
return_type: "{neon_type}"
14002+
attr:
14003+
- FnCall: [target_feature, ['enable = "neon,faminmax"']]
14004+
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [famin]]}]]
14005+
- FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]
14006+
safety:
14007+
unsafe: [neon]
14008+
types:
14009+
- float32x2_t
14010+
- float32x4_t
14011+
- float64x2_t
14012+
compose:
14013+
- LLVMLink:
14014+
name: "_vamin{neon_type.no}"
14015+
links:
14016+
- link: "llvm.aarch64.neon.famin.{neon_type}"
14017+
arch: aarch64,arm64ec

‎library/stdarch/intrinsics_data/arm_intrinsics.json

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Original file line numberDiff line numberDiff line change
@@ -118681,5 +118681,167 @@
118681118681
"ZIP2"
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]
118683118683
]
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},
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{
118686+
"SIMD_ISA": "Neon",
118687+
"name": "vamin_f32",
118688+
"arguments": [
118689+
"float32x2_t a",
118690+
"float32x2_t b"
118691+
],
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"return_type": {
118693+
"value": "float32x2_t"
118694+
},
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"Arguments_Preparation": {
118696+
"a": {
118697+
"register": "Vn.2S"
118698+
},
118699+
"b": {
118700+
"register": "Vm.2S"
118701+
}
118702+
},
118703+
"Architectures": [
118704+
"A64"
118705+
],
118706+
"instructions": [
118707+
[
118708+
"FAMIN"
118709+
]
118710+
]
118711+
},
118712+
{
118713+
"SIMD_ISA": "Neon",
118714+
"name": "vaminq_f32",
118715+
"arguments": [
118716+
"float32x4_t a",
118717+
"float32x4_t b"
118718+
],
118719+
"return_type": {
118720+
"value": "float32x4_t"
118721+
},
118722+
"Arguments_Preparation": {
118723+
"a": {
118724+
"register": "Vn.4S"
118725+
},
118726+
"b": {
118727+
"register": "Vm.4S"
118728+
}
118729+
},
118730+
"Architectures": [
118731+
"A64"
118732+
],
118733+
"instructions": [
118734+
[
118735+
"FAMIN"
118736+
]
118737+
]
118738+
},
118739+
{
118740+
"SIMD_ISA": "Neon",
118741+
"name": "vaminq_f64",
118742+
"arguments": [
118743+
"float64x2_t a",
118744+
"float64x2_t b"
118745+
],
118746+
"return_type": {
118747+
"value": "float64x2_t"
118748+
},
118749+
"Arguments_Preparation": {
118750+
"a": {
118751+
"register": "Vn.2D"
118752+
},
118753+
"b": {
118754+
"register": "Vm.2D"
118755+
}
118756+
},
118757+
"Architectures": [
118758+
"A64"
118759+
],
118760+
"instructions": [
118761+
[
118762+
"FAMIN"
118763+
]
118764+
]
118765+
},
118766+
{
118767+
"SIMD_ISA": "Neon",
118768+
"name": "vamax_f32",
118769+
"arguments": [
118770+
"float32x2_t a",
118771+
"float32x2_t b"
118772+
],
118773+
"return_type": {
118774+
"value": "float32x2_t"
118775+
},
118776+
"Arguments_Preparation": {
118777+
"a": {
118778+
"register": "Vn.2S"
118779+
},
118780+
"b": {
118781+
"register": "Vm.2S"
118782+
}
118783+
},
118784+
"Architectures": [
118785+
"A64"
118786+
],
118787+
"instructions": [
118788+
[
118789+
"FAMAX"
118790+
]
118791+
]
118792+
},
118793+
{
118794+
"SIMD_ISA": "Neon",
118795+
"name": "vamaxq_f32",
118796+
"arguments": [
118797+
"float32x4_t a",
118798+
"float32x4_t b"
118799+
],
118800+
"return_type": {
118801+
"value": "float32x4_t"
118802+
},
118803+
"Arguments_Preparation": {
118804+
"a": {
118805+
"register": "Vn.4S"
118806+
},
118807+
"b": {
118808+
"register": "Vm.4S"
118809+
}
118810+
},
118811+
"Architectures": [
118812+
"A64"
118813+
],
118814+
"instructions": [
118815+
[
118816+
"FAMAX"
118817+
]
118818+
]
118819+
},
118820+
{
118821+
"SIMD_ISA": "Neon",
118822+
"name": "vamaxq_f64",
118823+
"arguments": [
118824+
"float64x2_t a",
118825+
"float64x2_t b"
118826+
],
118827+
"return_type": {
118828+
"value": "float64x2_t"
118829+
},
118830+
"Arguments_Preparation": {
118831+
"a": {
118832+
"register": "Vn.2D"
118833+
},
118834+
"b": {
118835+
"register": "Vm.2D"
118836+
}
118837+
},
118838+
"Architectures": [
118839+
"A64"
118840+
],
118841+
"instructions": [
118842+
[
118843+
"FAMAX"
118844+
]
118845+
]
118684118846
}
118685118847
]

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