@@ -19,9 +19,23 @@ pub(crate) fn detect_features() -> cache::Initializer {
19
19
const PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE : u32 = 43 ;
20
20
const PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE : u32 = 44 ;
21
21
const PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE : u32 = 45 ;
22
+ const PF_ARM_SVE_INSTRUCTIONS_AVAILABLE : u32 = 46 ;
23
+ const PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE : u32 = 47 ;
24
+ const PF_ARM_SVE2_1_INSTRUCTIONS_AVAILABLE : u32 = 48 ;
25
+ const PF_ARM_SVE_AES_INSTRUCTIONS_AVAILABLE : u32 = 49 ;
26
+ const PF_ARM_SVE_PMULL128_INSTRUCTIONS_AVAILABLE : u32 = 50 ;
27
+ const PF_ARM_SVE_BITPERM_INSTRUCTIONS_AVAILABLE : u32 = 51 ;
28
+ // const PF_ARM_SVE_BF16_INSTRUCTIONS_AVAILABLE: u32 = 52;
29
+ // const PF_ARM_SVE_EBF16_INSTRUCTIONS_AVAILABLE: u32 = 53;
30
+ const PF_ARM_SVE_B16B16_INSTRUCTIONS_AVAILABLE : u32 = 54 ;
31
+ const PF_ARM_SVE_SHA3_INSTRUCTIONS_AVAILABLE : u32 = 55 ;
32
+ const PF_ARM_SVE_SM4_INSTRUCTIONS_AVAILABLE : u32 = 56 ;
33
+ // const PF_ARM_SVE_I8MM_INSTRUCTIONS_AVAILABLE: u32 = 57;
34
+ // const PF_ARM_SVE_F32MM_INSTRUCTIONS_AVAILABLE: u32 = 58;
35
+ // const PF_ARM_SVE_F64MM_INSTRUCTIONS_AVAILABLE: u32 = 59;
22
36
23
37
unsafe extern "system" {
24
- pub fn IsProcessorFeaturePresent ( ProcessorFeature : DWORD ) -> BOOL ;
38
+ fn IsProcessorFeaturePresent ( ProcessorFeature : DWORD ) -> BOOL ;
25
39
}
26
40
27
41
let mut value = cache:: Initializer :: default ( ) ;
@@ -64,6 +78,40 @@ pub(crate) fn detect_features() -> cache::Initializer {
64
78
Feature :: rcpc,
65
79
IsProcessorFeaturePresent ( PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE ) != FALSE ,
66
80
) ;
81
+ enable_feature (
82
+ Feature :: sve,
83
+ IsProcessorFeaturePresent ( PF_ARM_SVE_INSTRUCTIONS_AVAILABLE ) != FALSE ,
84
+ ) ;
85
+ enable_feature (
86
+ Feature :: sve2,
87
+ IsProcessorFeaturePresent ( PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE ) != FALSE ,
88
+ ) ;
89
+ enable_feature (
90
+ Feature :: sve2p1,
91
+ IsProcessorFeaturePresent ( PF_ARM_SVE2_1_INSTRUCTIONS_AVAILABLE ) != FALSE ,
92
+ ) ;
93
+ enable_feature (
94
+ Feature :: sve2_aes,
95
+ IsProcessorFeaturePresent ( PF_ARM_SVE_AES_INSTRUCTIONS_AVAILABLE ) != FALSE
96
+ && IsProcessorFeaturePresent ( PF_ARM_SVE_PMULL128_INSTRUCTIONS_AVAILABLE )
97
+ != FALSE ,
98
+ ) ;
99
+ enable_feature (
100
+ Feature :: sve2_bitperm,
101
+ IsProcessorFeaturePresent ( PF_ARM_SVE_BITPERM_INSTRUCTIONS_AVAILABLE ) != FALSE ,
102
+ ) ;
103
+ enable_feature (
104
+ Feature :: sve_b16b16,
105
+ IsProcessorFeaturePresent ( PF_ARM_SVE_B16B16_INSTRUCTIONS_AVAILABLE ) != FALSE ,
106
+ ) ;
107
+ enable_feature (
108
+ Feature :: sve2_sha3,
109
+ IsProcessorFeaturePresent ( PF_ARM_SVE_SHA3_INSTRUCTIONS_AVAILABLE ) != FALSE ,
110
+ ) ;
111
+ enable_feature (
112
+ Feature :: sve2_sm4,
113
+ IsProcessorFeaturePresent ( PF_ARM_SVE_SM4_INSTRUCTIONS_AVAILABLE ) != FALSE ,
114
+ ) ;
67
115
// PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE means aes, sha1, sha2 and
68
116
// pmull support
69
117
let crypto =
0 commit comments