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yaml --- r: 216372 b: refs/heads/stable c: 36dccec h: refs/heads/master v: v3
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[refs]

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@@ -29,5 +29,5 @@ refs/heads/tmp: 378a370ff2057afeb1eae86eb6e78c476866a4a6
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refs/tags/1.0.0-alpha.2: 4c705f6bc559886632d3871b04f58aab093bfa2f
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refs/tags/homu-tmp: a5286998df566e736b32f6795bfc3803bdaf453d
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refs/tags/1.0.0-beta: 8cbb92b53468ee2b0c2d3eeb8567005953d40828
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refs/heads/stable: 8f991d1fc27a176254ebfe99ed7e5a339cb9c7e2
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refs/heads/stable: 36dccec2f39c7e1da7f056ea421ad5256df3fb0b
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refs/tags/1.0.0: 55bd4f8ff2b323f317ae89e254ce87162d52a375

branches/stable/src/libcore/num/mod.rs

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@@ -745,7 +745,20 @@ macro_rules! uint_impl {
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#[stable(feature = "rust1", since = "1.0.0")]
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#[inline]
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pub fn trailing_zeros(self) -> u32 {
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unsafe { $cttz(self as $ActualT) as u32 }
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// As of LLVM 3.6 the codegen for the zero-safe cttz8 intrinsic
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// emits two conditional moves on x86_64. By promoting the value to
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// u16 and setting bit 8, we get better code without any conditional
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// operations.
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// FIXME: There's a LLVM patch (http://reviews.llvm.org/D9284)
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// pending, remove this workaround once LLVM generates better code
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// for cttz8.
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unsafe {
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if $BITS == 8 {
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intrinsics::cttz16(self as u16 | 0x100) as u32
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} else {
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$cttz(self as $ActualT) as u32
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}
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}
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}
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/// Shifts the bits to the left by a specified amount, `n`,

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