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Commit 3bfca3e

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author
Arnold Schwaighofer
committed
Refactor according to Evan's and Anton's suggestions.
llvm-svn: 47635
1 parent 8490c69 commit 3bfca3e

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2 files changed

+27
-10
lines changed

2 files changed

+27
-10
lines changed

llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 25 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1083,6 +1083,24 @@ static bool IsPossiblyOverwrittenArgumentOfTailCall(SDOperand Op,
10831083
return false;
10841084
}
10851085

1086+
/// CallRequiresGOTInRegister - Check whether the call requires the GOT pointer
1087+
/// in a register before calling.
1088+
bool X86TargetLowering::CallRequiresGOTPtrInReg(bool Is64Bit, bool IsTailCall) {
1089+
return !IsTailCall && !Is64Bit &&
1090+
getTargetMachine().getRelocationModel() == Reloc::PIC_ &&
1091+
Subtarget->isPICStyleGOT();
1092+
}
1093+
1094+
1095+
/// CallRequiresFnAddressInReg - Check whether the call requires the function
1096+
/// address to be loaded in a register.
1097+
bool
1098+
X86TargetLowering::CallRequiresFnAddressInReg(bool Is64Bit, bool IsTailCall) {
1099+
return !Is64Bit && IsTailCall &&
1100+
getTargetMachine().getRelocationModel() == Reloc::PIC_ &&
1101+
Subtarget->isPICStyleGOT();
1102+
}
1103+
10861104
/// CopyTailCallClobberedArgumentsToVRegs - Create virtual registers for all
10871105
/// arguments to force loading and guarantee that arguments sourcing from
10881106
/// incomming parameters are not overwriting each other.
@@ -1552,22 +1570,19 @@ SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
15521570

15531571
// ELF / PIC requires GOT in the EBX register before function calls via PLT
15541572
// GOT pointer.
1573+
if (CallRequiresGOTPtrInReg(Is64Bit, IsTailCall)) {
1574+
Chain = DAG.getCopyToReg(Chain, X86::EBX,
1575+
DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()),
1576+
InFlag);
1577+
InFlag = Chain.getValue(1);
1578+
}
15551579
// If we are tail calling and generating PIC/GOT style code load the address
15561580
// of the callee into ecx. The value in ecx is used as target of the tail
15571581
// jump. This is done to circumvent the ebx/callee-saved problem for tail
15581582
// calls on PIC/GOT architectures. Normally we would just put the address of
15591583
// GOT into ebx and then call target@PLT. But for tail callss ebx would be
15601584
// restored (since ebx is callee saved) before jumping to the target@PLT.
1561-
if (!IsTailCall && !Is64Bit &&
1562-
getTargetMachine().getRelocationModel() == Reloc::PIC_ &&
1563-
Subtarget->isPICStyleGOT()) {
1564-
Chain = DAG.getCopyToReg(Chain, X86::EBX,
1565-
DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()),
1566-
InFlag);
1567-
InFlag = Chain.getValue(1);
1568-
} else if (!Is64Bit && IsTailCall &&
1569-
getTargetMachine().getRelocationModel() == Reloc::PIC_ &&
1570-
Subtarget->isPICStyleGOT() ) {
1585+
if (CallRequiresFnAddressInReg(Is64Bit, IsTailCall)) {
15711586
// Note: The actual moving to ecx is done further down.
15721587
GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee);
15731588
if (G && !G->getGlobal()->hasHiddenVisibility() &&

llvm/lib/Target/X86/X86ISelLowering.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -491,6 +491,8 @@ namespace llvm {
491491

492492
// Call lowering helpers.
493493
bool IsCalleePop(SDOperand Op);
494+
bool CallRequiresGOTPtrInReg(bool Is64Bit, bool IsTailCall);
495+
bool CallRequiresFnAddressInReg(bool Is64Bit, bool IsTailCall);
494496
CCAssignFn *CCAssignFnForNode(SDOperand Op) const;
495497
NameDecorationStyle NameDecorationForFORMAL_ARGUMENTS(SDOperand Op);
496498
unsigned GetAlignedArgumentStackSize(unsigned StackSize, SelectionDAG &DAG);

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