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[AVX512] Correct isExtractSubvectorCheap so that it will return the correct answers for extracting 128-bits from a 512-bit vector and for mask registers.
Previously it would not return true for extracting either of the upper quarters of a 512-bit registers. For mask registers we support extracting anything from index 0. And otherwise we only support extracting the upper half of a register. Differential Revision: https://reviews.llvm.org/D36638 llvm-svn: 310794
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4579,7 +4579,13 @@ bool X86TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,
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if (!isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, ResVT))
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return false;
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return (Index == 0 || Index == ResVT.getVectorNumElements());
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// Mask vectors support all subregister combinations and operations that
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// extract half of vector.
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if (ResVT.getVectorElementType() == MVT::i1)
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return Index = 0 || ((ResVT.getSizeInBits() == SrcVT.getSizeInBits() * 2) &&
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(Index == ResVT.getVectorNumElements()));
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return (Index % ResVT.getVectorNumElements()) == 0;
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}
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bool X86TargetLowering::isCheapToSpeculateCttz() const {

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