---

yaml
---
r: 232479
b: refs/heads/try
c: d598bdd
h: refs/heads/master
i:
  232477: 87bcac5
  232475: 22ceb24
  232471: 94fd877
  232463: ef6e5ee
  232447: 30ffd9d
v: v3

Author: huonw

[refs]

@@ -1,7 +1,7 @@
 ---
 refs/heads/master: edeb4f1c86cbf6af8ef9874d4b3af50f721ea1b8
 refs/heads/snap-stage3: 1af31d4974e33027a68126fa5a5a3c2c6491824f
-refs/heads/try: 2a408ef6eee07b447b8b21f2233b01d3231c8f81
+refs/heads/try: d598bddc98f431ce92d9a3f33d7544ed637eda47
 refs/tags/release-0.1: 1f5c5126e96c79d22cb7862f75304136e204f105
 refs/tags/release-0.2: c870d2dffb391e14efb05aa27898f1f6333a9596
 refs/tags/release-0.3: b5f0d0f648d9a6153664837026ba1be43d3e2503

branches/try/src/librustc_platform_intrinsics/arm.rs

@@ -17,31 +17,27 @@ macro_rules! p {
     }
 }
 pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
-    Some(match name {
-        "vpmax_u8" => p!("vpmaxu.v8i8", (i8x8, i8x8) -> i8x8),
-        "vpmax_s8" => p!("vpmaxs.v8i8", (i8x8, i8x8) -> i8x8),
-        "vpmax_u16" => p!("vpmaxu.v4i16", (i16x4, i16x4) -> i16x4),
-        "vpmax_s16" => p!("vpmaxs.v4i16", (i16x4, i16x4) -> i16x4),
-        "vpmax_u32" => p!("vpmaxu.v2i32", (i32x2, i32x2) -> i32x2),
-        "vpmax_s32" => p!("vpmaxs.v2i32", (i32x2, i32x2) -> i32x2),
-
-        "vpmin_u8" => p!("vpminu.v8i8", (i8x8, i8x8) -> i8x8),
-        "vpmin_s8" => p!("vpmins.v8i8", (i8x8, i8x8) -> i8x8),
-        "vpmin_u16" => p!("vpminu.v4i16", (i16x4, i16x4) -> i16x4),
-        "vpmin_s16" => p!("vpmins.v4i16", (i16x4, i16x4) -> i16x4),
-        "vpmin_u32" => p!("vpminu.v2i32", (i32x2, i32x2) -> i32x2),
-        "vpmin_s32" => p!("vpmins.v2i32", (i32x2, i32x2) -> i32x2),
-
-        "vsqrtq_f32" => plain!("llvm.sqrt.v4f32", (f32x4) -> f32x4),
-        "vsqrtq_f64" => plain!("llvm.sqrt.v2f64", (f64x2) -> f64x2),
-
-        "vrecpeq_f32" => p!("vrecpe.v4f32", (f32x4) -> f32x4),
-        "vrsqrteq_f32" => p!("vrsqrte.v4f32", (f32x4) -> f32x4),
-        "vrsqrteq_f64" => p!("vrsqrte.v2f64", (f64x2) -> f64x2),
-
-        "vmaxq_f32" => p!("vmaxs.v4f32", (f32x4, f32x4) -> f32x4),
-
-        "vminq_f32" => p!("vmins.v4f32", (f32x4, f32x4) -> f32x4),
+    if !name.starts_with("v") { return None }
+    Some(match &name["v".len()..] {
+        "maxq_f32" => p!("vmaxs.v4f32", (f32x4, f32x4) -> f32x4),
+        "minq_f32" => p!("vmins.v4f32", (f32x4, f32x4) -> f32x4),
+        "pmax_s16" => p!("vpmaxs.v4i16", (i16x4, i16x4) -> i16x4),
+        "pmax_s32" => p!("vpmaxs.v2i32", (i32x2, i32x2) -> i32x2),
+        "pmax_s8" => p!("vpmaxs.v8i8", (i8x8, i8x8) -> i8x8),
+        "pmax_u16" => p!("vpmaxu.v4i16", (i16x4, i16x4) -> i16x4),
+        "pmax_u32" => p!("vpmaxu.v2i32", (i32x2, i32x2) -> i32x2),
+        "pmax_u8" => p!("vpmaxu.v8i8", (i8x8, i8x8) -> i8x8),
+        "pmin_s16" => p!("vpmins.v4i16", (i16x4, i16x4) -> i16x4),
+        "pmin_s32" => p!("vpmins.v2i32", (i32x2, i32x2) -> i32x2),
+        "pmin_s8" => p!("vpmins.v8i8", (i8x8, i8x8) -> i8x8),
+        "pmin_u16" => p!("vpminu.v4i16", (i16x4, i16x4) -> i16x4),
+        "pmin_u32" => p!("vpminu.v2i32", (i32x2, i32x2) -> i32x2),
+        "pmin_u8" => p!("vpminu.v8i8", (i8x8, i8x8) -> i8x8),
+        "recpeq_f32" => p!("vrecpe.v4f32", (f32x4) -> f32x4),
+        "rsqrteq_f32" => p!("vrsqrte.v4f32", (f32x4) -> f32x4),
+        "rsqrteq_f64" => p!("vrsqrte.v2f64", (f64x2) -> f64x2),
+        "sqrtq_f32" => plain!("llvm.sqrt.v4f32", (f32x4) -> f32x4),
+        "sqrtq_f64" => plain!("llvm.sqrt.v2f64", (f64x2) -> f64x2),
         _ => return None,
     })
 }