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Commit 87494a2

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yaml --- r: 486 b: refs/heads/master c: 60e5ad3 h: refs/heads/master v: v3
1 parent 9dfd602 commit 87494a2

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3 files changed

+21
-9
lines changed

3 files changed

+21
-9
lines changed

[refs]

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,2 @@
11
---
2-
refs/heads/master: 5d2e94838ecd0043cc8dfbe2f19d16d9703c2890
2+
refs/heads/master: 60e5ad384e6b748a780148e9232b9bb44cd08cec

trunk/src/Makefile

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Original file line numberDiff line numberDiff line change
@@ -398,6 +398,7 @@ TEST_XFAILS_X86 := $(TASK_XFAILS) \
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test/run-pass/generic-recursive-tag.rs \
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test/run-pass/int-lib.rs \
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test/run-pass/iter-ret.rs \
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test/run-pass/lib-deque.rs \
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test/run-pass/lib-map.rs \
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test/run-pass/mlist-cycle.rs \
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test/run-pass/obj-as.rs \

trunk/src/boot/be/x86.ml

Lines changed: 19 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -311,14 +311,25 @@ let emit_target_specific
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Il.Mem (Il.next_spill_slot e
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(Il.ScalarTy (Il.operand_scalar_ty op)))
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in
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let lhs_spill = next_spill_like lhs in
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let rhs_spill = next_spill_like rhs in
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mov lhs_spill lhs;
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mov rhs_spill rhs;
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mov lhs_eax (Il.Cell lhs_spill);
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mov rhs_ecx (Il.Cell rhs_spill);
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let is_eax cell =
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match cell with
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Il.Cell (Il.Reg (Il.Hreg hr, _)) -> hr = eax
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| _ -> false
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in
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if is_eax lhs
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then
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mov rhs_ecx rhs
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else
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begin
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let lhs_spill = next_spill_like lhs in
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let rhs_spill = next_spill_like rhs in
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mov lhs_spill lhs;
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mov rhs_spill rhs;
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mov lhs_eax (Il.Cell lhs_spill);
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mov rhs_ecx (Il.Cell rhs_spill);
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end;
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put (Il.Binary
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{ b with

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