---

yaml
---
r: 233478
b: refs/heads/beta
c: d598bdd
h: refs/heads/master
v: v3

Author: huonw

[refs]

@@ -23,7 +23,7 @@ refs/tags/0.9: 36870b185fc5f5486636d4515f0e22677493f225
 refs/tags/0.10: ac33f2b15782272ae348dbd7b14b8257b2148b5a
 refs/tags/0.11.0: e1247cb1d0d681be034adb4b558b5a0c0d5720f9
 refs/tags/0.12.0: f0c419429ef30723ceaf6b42f9b5a2aeb5d2e2d1
-refs/heads/beta: 2a408ef6eee07b447b8b21f2233b01d3231c8f81
+refs/heads/beta: d598bddc98f431ce92d9a3f33d7544ed637eda47
 refs/tags/1.0.0-alpha: e42bd6d93a1d3433c486200587f8f9e12590a4d7
 refs/heads/tmp: 370fe2786109360f7c35b8ba552b83b773dd71d6
 refs/tags/1.0.0-alpha.2: 4c705f6bc559886632d3871b04f58aab093bfa2f

branches/beta/src/librustc_platform_intrinsics/arm.rs

@@ -17,31 +17,27 @@ macro_rules! p {
     }
 }
 pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
-    Some(match name {
-        "vpmax_u8" => p!("vpmaxu.v8i8", (i8x8, i8x8) -> i8x8),
-        "vpmax_s8" => p!("vpmaxs.v8i8", (i8x8, i8x8) -> i8x8),
-        "vpmax_u16" => p!("vpmaxu.v4i16", (i16x4, i16x4) -> i16x4),
-        "vpmax_s16" => p!("vpmaxs.v4i16", (i16x4, i16x4) -> i16x4),
-        "vpmax_u32" => p!("vpmaxu.v2i32", (i32x2, i32x2) -> i32x2),
-        "vpmax_s32" => p!("vpmaxs.v2i32", (i32x2, i32x2) -> i32x2),
-
-        "vpmin_u8" => p!("vpminu.v8i8", (i8x8, i8x8) -> i8x8),
-        "vpmin_s8" => p!("vpmins.v8i8", (i8x8, i8x8) -> i8x8),
-        "vpmin_u16" => p!("vpminu.v4i16", (i16x4, i16x4) -> i16x4),
-        "vpmin_s16" => p!("vpmins.v4i16", (i16x4, i16x4) -> i16x4),
-        "vpmin_u32" => p!("vpminu.v2i32", (i32x2, i32x2) -> i32x2),
-        "vpmin_s32" => p!("vpmins.v2i32", (i32x2, i32x2) -> i32x2),
-
-        "vsqrtq_f32" => plain!("llvm.sqrt.v4f32", (f32x4) -> f32x4),
-        "vsqrtq_f64" => plain!("llvm.sqrt.v2f64", (f64x2) -> f64x2),
-
-        "vrecpeq_f32" => p!("vrecpe.v4f32", (f32x4) -> f32x4),
-        "vrsqrteq_f32" => p!("vrsqrte.v4f32", (f32x4) -> f32x4),
-        "vrsqrteq_f64" => p!("vrsqrte.v2f64", (f64x2) -> f64x2),
-
-        "vmaxq_f32" => p!("vmaxs.v4f32", (f32x4, f32x4) -> f32x4),
-
-        "vminq_f32" => p!("vmins.v4f32", (f32x4, f32x4) -> f32x4),
+    if !name.starts_with("v") { return None }
+    Some(match &name["v".len()..] {
+        "maxq_f32" => p!("vmaxs.v4f32", (f32x4, f32x4) -> f32x4),
+        "minq_f32" => p!("vmins.v4f32", (f32x4, f32x4) -> f32x4),
+        "pmax_s16" => p!("vpmaxs.v4i16", (i16x4, i16x4) -> i16x4),
+        "pmax_s32" => p!("vpmaxs.v2i32", (i32x2, i32x2) -> i32x2),
+        "pmax_s8" => p!("vpmaxs.v8i8", (i8x8, i8x8) -> i8x8),
+        "pmax_u16" => p!("vpmaxu.v4i16", (i16x4, i16x4) -> i16x4),
+        "pmax_u32" => p!("vpmaxu.v2i32", (i32x2, i32x2) -> i32x2),
+        "pmax_u8" => p!("vpmaxu.v8i8", (i8x8, i8x8) -> i8x8),
+        "pmin_s16" => p!("vpmins.v4i16", (i16x4, i16x4) -> i16x4),
+        "pmin_s32" => p!("vpmins.v2i32", (i32x2, i32x2) -> i32x2),
+        "pmin_s8" => p!("vpmins.v8i8", (i8x8, i8x8) -> i8x8),
+        "pmin_u16" => p!("vpminu.v4i16", (i16x4, i16x4) -> i16x4),
+        "pmin_u32" => p!("vpminu.v2i32", (i32x2, i32x2) -> i32x2),
+        "pmin_u8" => p!("vpminu.v8i8", (i8x8, i8x8) -> i8x8),
+        "recpeq_f32" => p!("vrecpe.v4f32", (f32x4) -> f32x4),
+        "rsqrteq_f32" => p!("vrsqrte.v4f32", (f32x4) -> f32x4),
+        "rsqrteq_f64" => p!("vrsqrte.v2f64", (f64x2) -> f64x2),
+        "sqrtq_f32" => plain!("llvm.sqrt.v4f32", (f32x4) -> f32x4),
+        "sqrtq_f64" => plain!("llvm.sqrt.v2f64", (f64x2) -> f64x2),
         _ => return None,
     })
 }