MIR pre-codegen test for .try_into().ok()

Author: scottmcm

tests/mir-opt/pre-codegen/transient_enums.checked_as_u32.PreCodegen.after.mir

@@ -0,0 +1,78 @@
+// MIR for `checked_as_u32` after PreCodegen
+
+fn checked_as_u32(_1: u64) -> Option<u32> {
+    debug t => _1;                       // in scope 0 at $DIR/transient_enums.rs:+0:23: +0:24
+    let mut _0: std::option::Option<u32>; // return place in scope 0 at $DIR/transient_enums.rs:+0:34: +0:45
+    let mut _2: std::result::Result<u32, std::num::TryFromIntError>; // in scope 0 at $DIR/transient_enums.rs:+1:5: +1:17
+    scope 1 (inlined <u64 as TryInto<u32>>::try_into) { // at $DIR/transient_enums.rs:9:7: 9:17
+        debug self => _1;                // in scope 1 at $SRC_DIR/core/src/convert/mod.rs:LL:COL
+        scope 2 (inlined convert::num::<impl TryFrom<u64> for u32>::try_from) { // at $SRC_DIR/core/src/convert/mod.rs:LL:COL
+            debug u => _1;               // in scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+            let mut _3: bool;            // in scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+            let mut _4: u64;             // in scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+            let mut _5: u32;             // in scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+        }
+    }
+    scope 3 (inlined Result::<u32, TryFromIntError>::ok) { // at $DIR/transient_enums.rs:9:18: 9:22
+        debug self => _2;                // in scope 3 at $SRC_DIR/core/src/result.rs:LL:COL
+        let mut _6: isize;               // in scope 3 at $SRC_DIR/core/src/result.rs:LL:COL
+        let _7: u32;                     // in scope 3 at $SRC_DIR/core/src/result.rs:LL:COL
+        scope 4 {
+            debug x => _7;               // in scope 4 at $SRC_DIR/core/src/result.rs:LL:COL
+        }
+    }
+
+    bb0: {
+        StorageLive(_2);                 // scope 0 at $DIR/transient_enums.rs:+1:5: +1:17
+        StorageLive(_3);                 // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+        StorageLive(_4);                 // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+        _4 = const 4294967295_u64;       // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+        _3 = Gt(_1, move _4);            // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+        StorageDead(_4);                 // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+        switchInt(move _3) -> [0: bb2, otherwise: bb1]; // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+    }
+
+    bb1: {
+        _2 = Result::<u32, TryFromIntError>::Err(const TryFromIntError(())); // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+                                         // mir::Constant
+                                         // + span: no-location
+                                         // + literal: Const { ty: TryFromIntError, val: Value(<ZST>) }
+        goto -> bb3;                     // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+    }
+
+    bb2: {
+        StorageLive(_5);                 // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+        _5 = _1 as u32 (IntToInt);       // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+        _2 = Result::<u32, TryFromIntError>::Ok(move _5); // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+        StorageDead(_5);                 // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+        goto -> bb3;                     // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+    }
+
+    bb3: {
+        StorageDead(_3);                 // scope 2 at $SRC_DIR/core/src/convert/num.rs:LL:COL
+        StorageLive(_7);                 // scope 0 at $DIR/transient_enums.rs:+1:18: +1:22
+        _6 = discriminant(_2);           // scope 3 at $SRC_DIR/core/src/result.rs:LL:COL
+        switchInt(move _6) -> [0: bb6, 1: bb4, otherwise: bb5]; // scope 3 at $SRC_DIR/core/src/result.rs:LL:COL
+    }
+
+    bb4: {
+        _0 = Option::<u32>::None;        // scope 3 at $SRC_DIR/core/src/result.rs:LL:COL
+        goto -> bb7;                     // scope 3 at $SRC_DIR/core/src/result.rs:LL:COL
+    }
+
+    bb5: {
+        unreachable;                     // scope 3 at $SRC_DIR/core/src/result.rs:LL:COL
+    }
+
+    bb6: {
+        _7 = move ((_2 as Ok).0: u32);   // scope 3 at $SRC_DIR/core/src/result.rs:LL:COL
+        _0 = Option::<u32>::Some(move _7); // scope 4 at $SRC_DIR/core/src/result.rs:LL:COL
+        goto -> bb7;                     // scope 3 at $SRC_DIR/core/src/result.rs:LL:COL
+    }
+
+    bb7: {
+        StorageDead(_7);                 // scope 0 at $DIR/transient_enums.rs:+1:18: +1:22
+        StorageDead(_2);                 // scope 0 at $DIR/transient_enums.rs:+1:21: +1:22
+        return;                          // scope 0 at $DIR/transient_enums.rs:+2:2: +2:2
+    }
+}

tests/mir-opt/pre-codegen/transient_enums.rs

@@ -0,0 +1,10 @@
+// compile-flags: -O -Zmir-opt-level=2 -Cdebuginfo=0
+// ignore-debug
+// edition: 2021
+
+#![crate_type = "lib"]
+
+// EMIT_MIR transient_enums.checked_as_u32.PreCodegen.after.mir
+pub fn checked_as_u32(t: u64) -> Option<u32> {
+    t.try_into().ok()
+}