Skip to content

Commit edc5f73

Browse files
committed
Correct the shift overflow check in miri
1 parent aedd4c6 commit edc5f73

File tree

1 file changed

+1
-1
lines changed

1 file changed

+1
-1
lines changed

src/librustc_mir/interpret/operator.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@ impl<'a, 'mir, 'tcx, M: Machine<'mir, 'tcx>> EvalContext<'a, 'mir, 'tcx, M> {
9090
let signed = left_layout.abi.is_signed();
9191
let mut r = r as u32;
9292
let size = left_layout.size.bits() as u32;
93-
let oflo = r > size;
93+
let oflo = r >= size;
9494
if oflo {
9595
r %= size;
9696
}

0 commit comments

Comments
 (0)