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Daniel SmithAmanieu
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Add one AVX512f comparison and the intrinsics needed to test it
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crates/core_arch/src/simd.rs

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@@ -201,3 +201,7 @@ simd_ty!(i32x16[i32]:
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simd_ty!(i64x8[i64]:
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i64, i64, i64, i64, i64, i64, i64, i64
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| x0, x1, x2, x3, x4, x5, x6, x7);
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simd_ty!(u64x8[u64]:
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u64, u64, u64, u64, u64, u64, u64, u64
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| x0, x1, x2, x3, x4, x5, x6, x7);

crates/core_arch/src/x86/avx512f.rs

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@@ -94,6 +94,35 @@ pub unsafe fn _mm512_set1_epi64(a: i64) -> __m512i {
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transmute(i64x8::splat(a))
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}
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/// Sets packed 64-bit integers in `dst` with the supplied values.
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///
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/// [Intel's documentation]( https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,4909&text=_mm512_set_epi64)
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#[inline]
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#[target_feature(enable = "avx512f")]
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pub unsafe fn _mm512_set_epi64(
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e7: i64,
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e6: i64,
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e5: i64,
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e4: i64,
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e3: i64,
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e2: i64,
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e1: i64,
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e0: i64,
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) -> __m512i {
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let r = i64x8(e0, e1, e2, e3, e4, e5, e6, e7);
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transmute(r)
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}
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/// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmplt_epu64)
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#[inline]
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#[target_feature(enable = "avx512f")]
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#[cfg_attr(test, assert_instr(vpcmpuq))]
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pub unsafe fn _mm512_cmplt_epu64_mask(a: __m512i, b: __m512i) -> __mmask8 {
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simd_bitmask::<__m512i, _>(simd_lt(a.as_u64x8(), b.as_u64x8()))
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}
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#[cfg(test)]
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mod tests {
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use std;
@@ -197,4 +226,12 @@ mod tests {
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);
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assert_eq_m512i(r, e);
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}
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#[simd_test(enable = "avx512f")]
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unsafe fn test_mm512_cmplt_epu64_mask() {
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let a = _mm512_set_epi64(0, 1, -1, u64::MAX as i64, i64::MAX, i64::MIN, 100, -100);
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let b = _mm512_set1_epi64(-1);
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let m = _mm512_cmplt_epu64_mask(a, b);
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assert_eq!(m, 0b11001111);
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}
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}

crates/core_arch/src/x86/mod.rs

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@@ -346,6 +346,10 @@ types! {
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#[allow(non_camel_case_types)]
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pub type __mmask16 = u16;
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/// The `__mmask8` type used in AVX-512 intrinsics, a 8-bit integer
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#[allow(non_camel_case_types)]
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pub type __mmask8 = u8;
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#[cfg(test)]
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mod test;
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#[cfg(test)]
@@ -509,6 +513,11 @@ pub(crate) trait m512iExt: Sized {
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fn as_i32x16(self) -> crate::core_arch::simd::i32x16 {
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unsafe { transmute(self.as_m512i()) }
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}
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#[inline]
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fn as_u64x8(self) -> crate::core_arch::simd::u64x8 {
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unsafe { transmute(self.as_m512i()) }
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}
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}
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impl m512iExt for __m512i {

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