@@ -220,6 +220,47 @@ pub unsafe fn _mm512_mask_cmpneq_epu64_mask(m: __mmask8, a: __m512i, b: __m512i)
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_mm512_cmpneq_epu64_mask ( a, b) & m
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}
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+ /// Compare packed unsigned 64-bit integers in a and b based on the comparison operand specified by op.
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+ ///
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+ /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmp_epu64)
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+ #[ inline]
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+ #[ target_feature( enable = "avx512f" ) ]
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+ #[ rustc_args_required_const( 2 ) ]
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+ #[ cfg_attr( test, assert_instr( vpcmp, op = 0 ) ) ]
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+ pub unsafe fn _mm512_cmp_epu64_mask ( a : __m512i , b : __m512i , op : _MM_CMPINT_ENUM ) -> __mmask8 {
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+ let neg_one = -1 ;
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+ macro_rules! call {
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+ ( $imm3: expr) => {
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+ vpcmpuq( a. as_i64x8( ) , b. as_i64x8( ) , $imm3, neg_one)
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+ } ;
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+ }
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+ let r = constify_imm3 ! ( op, call) ;
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+ transmute ( r)
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+ }
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+
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+ /// Compare packed unsigned 64-bit integers in a and b based on the comparison operand specified by op,
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+ /// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
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+ ///
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+ /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmp_epu64)
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+ #[ inline]
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+ #[ target_feature( enable = "avx512f" ) ]
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+ #[ rustc_args_required_const( 3 ) ]
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+ #[ cfg_attr( test, assert_instr( vpcmp, op = 0 ) ) ]
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+ pub unsafe fn _mm512_mask_cmp_epu64_mask (
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+ m : __mmask8 ,
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+ a : __m512i ,
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+ b : __m512i ,
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+ op : _MM_CMPINT_ENUM ,
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+ ) -> __mmask8 {
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+ macro_rules! call {
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+ ( $imm3: expr) => {
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+ vpcmpuq( a. as_i64x8( ) , b. as_i64x8( ) , $imm3, m as i8 )
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+ } ;
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+ }
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+ let r = constify_imm3 ! ( op, call) ;
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+ transmute ( r)
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+ }
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+
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/// Compare packed signed 64-bit integers in a and b for less-than, and store the results in a mask vector.
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmplt_epi64)
@@ -335,7 +376,7 @@ pub unsafe fn _mm512_cmpneq_epi64_mask(a: __m512i, b: __m512i) -> __mmask8 {
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simd_bitmask :: < __m512i , _ > ( simd_ne ( a. as_i64x8 ( ) , b. as_i64x8 ( ) ) )
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}
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- ///Compare packed signed 64-bit integers in a and b for inequality, and store the results in a mask vector k
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+ /// Compare packed signed 64-bit integers in a and b for inequality, and store the results in a mask vector k
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/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
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///
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmpneq_epi64)
@@ -346,6 +387,72 @@ pub unsafe fn _mm512_mask_cmpneq_epi64_mask(m: __mmask8, a: __m512i, b: __m512i)
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_mm512_cmpneq_epi64_mask ( a, b) & m
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}
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+ /// Compare packed signed 64-bit integers in a and b based on the comparison operand specified by op.
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+ ///
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+ /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmp_epi64)
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+ #[ inline]
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+ #[ target_feature( enable = "avx512f" ) ]
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+ #[ rustc_args_required_const( 2 ) ]
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+ #[ cfg_attr( test, assert_instr( vpcmp, op = 0 ) ) ]
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+ pub unsafe fn _mm512_cmp_epi64_mask ( a : __m512i , b : __m512i , op : _MM_CMPINT_ENUM ) -> __mmask8 {
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+ let neg_one = -1 ;
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+ macro_rules! call {
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+ ( $imm3: expr) => {
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+ vpcmpq( a. as_i64x8( ) , b. as_i64x8( ) , $imm3, neg_one)
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+ } ;
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+ }
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+ let r = constify_imm3 ! ( op, call) ;
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+ transmute ( r)
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+ }
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+
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+ /// Compare packed signed 64-bit integers in a and b based on the comparison operand specified by op,
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+ /// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
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+ ///
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+ /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmp_epi64)
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+ #[ inline]
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+ #[ target_feature( enable = "avx512f" ) ]
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+ #[ rustc_args_required_const( 3 ) ]
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+ #[ cfg_attr( test, assert_instr( vpcmp, op = 0 ) ) ]
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+ pub unsafe fn _mm512_mask_cmp_epi64_mask (
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+ m : __mmask8 ,
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+ a : __m512i ,
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+ b : __m512i ,
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+ op : _MM_CMPINT_ENUM ,
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+ ) -> __mmask8 {
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+ macro_rules! call {
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+ ( $imm3: expr) => {
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+ vpcmpq( a. as_i64x8( ) , b. as_i64x8( ) , $imm3, m as i8 )
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+ } ;
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+ }
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+ let r = constify_imm3 ! ( op, call) ;
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+ transmute ( r)
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+ }
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+
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+ /// Equal
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+ pub const _MM_CMPINT_EQ: _MM_CMPINT_ENUM = 0x00 ;
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+ /// Less-than
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+ pub const _MM_CMPINT_LT: _MM_CMPINT_ENUM = 0x01 ;
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+ /// Less-than-or-equal
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+ pub const _MM_CMPINT_LE: _MM_CMPINT_ENUM = 0x02 ;
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+ /// False
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+ pub const _MM_CMPINT_FALSE: _MM_CMPINT_ENUM = 0x03 ;
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+ /// Not-equal
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+ pub const _MM_CMPINT_NE: _MM_CMPINT_ENUM = 0x04 ;
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+ /// Not less-than
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+ pub const _MM_CMPINT_NLT: _MM_CMPINT_ENUM = 0x05 ;
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+ /// Not less-than-or-equal
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+ pub const _MM_CMPINT_NLE: _MM_CMPINT_ENUM = 0x06 ;
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+ /// True
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+ pub const _MM_CMPINT_TRUE: _MM_CMPINT_ENUM = 0x07 ;
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+
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+ #[ allow( improper_ctypes) ]
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+ extern "C" {
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+ #[ link_name = "llvm.x86.avx512.mask.ucmp.q.512" ]
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+ fn vpcmpuq ( a : i64x8 , b : i64x8 , op : i32 , m : i8 ) -> i8 ;
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+ #[ link_name = "llvm.x86.avx512.mask.cmp.q.512" ]
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+ fn vpcmpq ( a : i64x8 , b : i64x8 , op : i32 , m : i8 ) -> i8 ;
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+ }
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+
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#[ cfg( test) ]
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mod tests {
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use std;
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