@@ -1813,23 +1813,26 @@ pub unsafe fn vld1q_dup_f32(addr: *const f32) -> float32x4_t {
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transmute ( f32x4:: new ( v, v, v, v) )
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}
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+ // These float-to-int implementations have undefined behaviour when `a` overflows
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+ // the destination type. Clang has the same problem: https://llvm.org/PR47510
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+
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/// Floating-point Convert to Signed fixed-point, rounding toward Zero (vector)
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#[ inline]
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+ #[ cfg( target_arch = "arm" ) ]
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#[ target_feature( enable = "neon" ) ]
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- #[ cfg_attr( target_arch = "arm" , target_feature( enable = "v7" ) ) ]
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- #[ cfg_attr( all( test, target_arch = "arm" ) , assert_instr( "vcvt.s32.f32" ) ) ]
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- #[ cfg_attr( all( test, target_arch = "aarch64" ) , assert_instr( fcvtzs) ) ]
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+ #[ target_feature( enable = "v7" ) ]
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+ #[ cfg_attr( test, assert_instr( "vcvt.s32.f32" ) ) ]
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pub unsafe fn vcvtq_s32_f32 ( a : float32x4_t ) -> int32x4_t {
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use crate :: core_arch:: simd:: { f32x4, i32x4} ;
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transmute ( simd_cast :: < _ , i32x4 > ( transmute :: < _ , f32x4 > ( a) ) )
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}
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/// Floating-point Convert to Unsigned fixed-point, rounding toward Zero (vector)
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#[ inline]
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+ #[ cfg( target_arch = "arm" ) ]
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#[ target_feature( enable = "neon" ) ]
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- #[ cfg_attr( target_arch = "arm" , target_feature( enable = "v7" ) ) ]
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- #[ cfg_attr( all( test, target_arch = "arm" ) , assert_instr( "vcvt.u32.f32" ) ) ]
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- #[ cfg_attr( all( test, target_arch = "aarch64" ) , assert_instr( fcvtzu) ) ]
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+ #[ target_feature( enable = "v7" ) ]
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+ #[ cfg_attr( test, assert_instr( "vcvt.u32.f32" ) ) ]
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pub unsafe fn vcvtq_u32_f32 ( a : float32x4_t ) -> uint32x4_t {
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use crate :: core_arch:: simd:: { f32x4, u32x4} ;
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transmute ( simd_cast :: < _ , u32x4 > ( transmute :: < _ , f32x4 > ( a) ) )
@@ -1900,40 +1903,22 @@ mod tests {
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assert_eq ! ( r, e) ;
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}
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+ #[ cfg( target_arch = "arm" ) ]
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#[ simd_test( enable = "neon" ) ]
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unsafe fn test_vcvtq_s32_f32 ( ) {
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let f = f32x4:: new ( -1. , 2. , 3. , 4. ) ;
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let e = i32x4:: new ( -1 , 2 , 3 , 4 ) ;
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let r: i32x4 = transmute ( vcvtq_s32_f32 ( transmute ( f) ) ) ;
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assert_eq ! ( r, e) ;
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-
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- let f = f32x4:: new ( 10e37 , 2. , 3. , 4. ) ;
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- let e = i32x4:: new ( 0x7fffffff , 2 , 3 , 4 ) ;
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- let r: i32x4 = transmute ( vcvtq_u32_f32 ( transmute ( f) ) ) ;
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- assert_eq ! ( r, e) ;
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-
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- let f = f32x4:: new ( -10e37 , 2. , 3. , 4. ) ;
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- let e = i32x4:: new ( -0x80000000 , 2 , 3 , 4 ) ;
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- let r: i32x4 = transmute ( vcvtq_u32_f32 ( transmute ( f) ) ) ;
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- assert_eq ! ( r, e) ;
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}
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+ #[ cfg( target_arch = "arm" ) ]
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#[ simd_test( enable = "neon" ) ]
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unsafe fn test_vcvtq_u32_f32 ( ) {
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let f = f32x4:: new ( 1. , 2. , 3. , 4. ) ;
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let e = u32x4:: new ( 1 , 2 , 3 , 4 ) ;
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let r: u32x4 = transmute ( vcvtq_u32_f32 ( transmute ( f) ) ) ;
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assert_eq ! ( r, e) ;
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-
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- let f = f32x4:: new ( -1. , 2. , 3. , 4. ) ;
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- let e = u32x4:: new ( 0 , 2 , 3 , 4 ) ;
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- let r: u32x4 = transmute ( vcvtq_u32_f32 ( transmute ( f) ) ) ;
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- assert_eq ! ( r, e) ;
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-
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- let f = f32x4:: new ( 10e37 , 2. , 3. , 4. ) ;
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- let e = u32x4:: new ( 0xffffffff , 2 , 3 , 4 ) ;
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- let r: u32x4 = transmute ( vcvtq_u32_f32 ( transmute ( f) ) ) ;
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- assert_eq ! ( r, e) ;
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}
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#[ simd_test( enable = "neon" ) ]
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