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Avx512f avx512vl (#995)
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‎crates/core_arch/avx512f.md

Lines changed: 165 additions & 70 deletions
Original file line numberDiff line numberDiff line change
@@ -1176,22 +1176,167 @@
11761176
* [x] [`_mm256_mask_andnot_epi64`]
11771177
* [x] [`_mm256_maskz_andnot_epi64`]
11781178
* [x] [`_mm512_andnot_si512`]
1179-
1179+
* [x] [`_mm512_mask_unpackhi_epi32`]
1180+
* [x] [`_mm512_unpackhi_epi32`]
1181+
* [x] [`_mm_mask_unpackhi_epi32`]
1182+
* [x] [`_mm_maskz_unpackhi_epi32`]
1183+
* [x] [`_mm256_mask_unpackhi_epi32`]
1184+
* [x] [`_mm256_maskz_unpackhi_epi32`]
1185+
* [x] [`_mm512_unpackhi_epi64`]
1186+
* [x] [`_mm512_mask_unpackhi_epi64`]
1187+
* [x] [`_mm_mask_unpackhi_epi64`]
1188+
* [x] [`_mm_maskz_unpackhi_epi64`]
1189+
* [x] [`_mm256_mask_unpackhi_epi64`]
1190+
* [x] [`_mm256_maskz_unpackhi_epi64`]
1191+
* [x] [`_mm512_unpackhi_ps`]
1192+
* [x] [`_mm512_mask_unpackhi_ps`]
1193+
* [x] [`_mm_mask_unpackhi_ps`]
1194+
* [x] [`_mm_maskz_unpackhi_ps`]
1195+
* [x] [`_mm256_mask_unpackhi_ps`]
1196+
* [x] [`_mm256_maskz_unpackhi_ps`]
1197+
* [x] [`_mm512_unpackhi_pd`]
1198+
* [x] [`_mm512_mask_unpackhi_pd`]
1199+
* [x] [`_mm_mask_unpackhi_pd`]
1200+
* [x] [`_mm_maskz_unpackhi_pd`]
1201+
* [x] [`_mm256_mask_unpackhi_pd`]
1202+
* [x] [`_mm256_maskz_unpackhi_pd`]
1203+
* [x] [`_mm512_mask_unpacklo_epi32`]
1204+
* [x] [`_mm512_unpacklo_epi32`]
1205+
* [x] [`_mm_mask_unpacklo_epi32`]
1206+
* [x] [`_mm_maskz_unpacklo_epi32`]
1207+
* [x] [`_mm256_mask_unpacklo_epi32`]
1208+
* [x] [`_mm256_maskz_unpacklo_epi32`]
1209+
* [x] [`_mm512_unpacklo_epi64`]
1210+
* [x] [`_mm512_mask_unpacklo_epi64`]
1211+
* [x] [`_mm_mask_unpacklo_epi64`]
1212+
* [x] [`_mm_maskz_unpacklo_epi64`]
1213+
* [x] [`_mm256_mask_unpacklo_epi64`]
1214+
* [x] [`_mm256_maskz_unpacklo_epi64`]
1215+
* [x] [`_mm512_unpacklo_ps`]
1216+
* [x] [`_mm512_mask_unpacklo_ps`]
1217+
* [x] [`_mm_mask_unpacklo_ps`]
1218+
* [x] [`_mm_maskz_unpacklo_ps`]
1219+
* [x] [`_mm256_mask_unpacklo_ps`]
1220+
* [x] [`_mm256_maskz_unpacklo_ps`]
1221+
* [x] [`_mm512_unpacklo_pd`]
1222+
* [x] [`_mm512_mask_unpacklo_pd`]
1223+
* [x] [`_mm_mask_unpacklo_pd`]
1224+
* [x] [`_mm_maskz_unpacklo_pd`]
1225+
* [x] [`_mm256_mask_unpacklo_pd`]
1226+
* [x] [`_mm256_maskz_unpacklo_pd`]
1227+
* [x] [`_mm512_mask_blend_epi32`]
1228+
* [x] [`_mm_mask_blend_epi32`]
1229+
* [x] [`_mm256_mask_blend_epi32`]
1230+
* [x] [`_mm512_mask_blend_epi64`]
1231+
* [x] [`_mm_mask_blend_epi64`]
1232+
* [x] [`_mm256_mask_blend_epi64`]
1233+
* [x] [`_mm512_mask_blend_ps`]
1234+
* [x] [`_mm_mask_blend_ps`]
1235+
* [x] [`_mm256_mask_blend_ps`]
1236+
* [x] [`_mm512_mask_blend_pd`]
1237+
* [x] [`_mm_mask_blend_pd`]
1238+
* [x] [`_mm256_mask_blend_pd`]
1239+
* [x] [`_mm512_broadcast_f32x4`]
1240+
* [x] [`_mm512_mask_broadcast_f32x4`]
1241+
* [x] [`_mm512_maskz_broadcast_f32x4`]
1242+
* [x] [`_mm256_broadcast_f32x4`]
1243+
* [x] [`_mm256_mask_broadcast_f32x4`]
1244+
* [x] [`_mm256_maskz_broadcast_f32x4`]
1245+
* [x] [`_mm512_broadcast_f64x4`]
1246+
* [x] [`_mm512_mask_broadcast_f64x4`]
1247+
* [x] [`_mm512_maskz_broadcast_f64x4`]
1248+
* [x] [`_mm512_broadcast_i32x4`]
1249+
* [x] [`_mm512_mask_broadcast_i32x4`]
1250+
* [x] [`_mm512_maskz_broadcast_i32x4`]
1251+
* [x] [`_mm256_broadcast_i32x4`]
1252+
* [x] [`_mm256_mask_broadcast_i32x4`]
1253+
* [x] [`_mm256_maskz_broadcast_i32x4`]
1254+
* [x] [`_mm512_broadcast_i64x4`]
1255+
* [x] [`_mm512_mask_broadcast_i64x4`]
1256+
* [x] [`_mm512_maskz_broadcast_i64x4`]
1257+
* [x] [`_mm512_broadcastd_epi32`]
1258+
* [x] [`_mm512_mask_broadcastd_epi32`]
1259+
* [x] [`_mm512_maskz_broadcastd_epi32`]
1260+
* [x] [`_mm_mask_broadcastd_epi32`]
1261+
* [x] [`_mm_maskz_broadcastd_epi32`]
1262+
* [x] [`_mm256_mask_broadcastd_epi32`]
1263+
* [x] [`_mm256_maskz_broadcastd_epi32`]
1264+
* [x] [`_mm512_broadcastq_epi64`]
1265+
* [x] [`_mm512_mask_broadcastq_epi64`]
1266+
* [x] [`_mm512_maskz_broadcastq_epi64`]
1267+
* [x] [`_mm_mask_broadcastq_epi64`]
1268+
* [x] [`_mm_maskz_broadcastq_epi64`]
1269+
* [x] [`_mm256_mask_broadcastq_epi64`]
1270+
* [x] [`_mm256_maskz_broadcastq_epi64`]
1271+
* [x] [`_mm512_broadcastss_ps`]
1272+
* [x] [`_mm512_mask_broadcastss_ps`]
1273+
* [x] [`_mm512_maskz_broadcastss_ps`]
1274+
* [x] [`_mm_mask_broadcastss_ps`]
1275+
* [x] [`_mm_maskz_broadcastss_ps`]
1276+
* [x] [`_mm256_mask_broadcastss_ps`]
1277+
* [x] [`_mm256_maskz_broadcastss_ps`]
1278+
* [x] [`_mm512_broadcastsd_pd`]
1279+
* [x] [`_mm512_mask_broadcastsd_pd`]
1280+
* [x] [`_mm512_maskz_broadcastsd_pd`]
1281+
* [x] [`_mm256_mask_broadcastsd_pd`]
1282+
* [x] [`_mm256_maskz_broadcastsd_pd`]
1283+
* [x] [`_mm512_shuffle_epi32`]
1284+
* [x] [`_mm512_mask_shuffle_epi32`]
1285+
* [x] [`_mm_mask_shuffle_epi32`]
1286+
* [x] [`_mm_maskz_shuffle_epi32`]
1287+
* [x] [`_mm256_mask_shuffle_epi32`]
1288+
* [x] [`_mm256_maskz_shuffle_epi32`]
1289+
* [x] [`_mm512_shuffle_ps`]
1290+
* [x] [`_mm512_mask_shuffle_ps`]
1291+
* [x] [`_mm_mask_shuffle_ps`]
1292+
* [x] [`_mm_maskz_shuffle_ps`]
1293+
* [x] [`_mm256_mask_shuffle_ps`]
1294+
* [x] [`_mm256_maskz_shuffle_ps`]
1295+
* [x] [`_mm512_shuffle_pd`]
1296+
* [x] [`_mm512_mask_shuffle_pd`]
1297+
* [x] [`_mm_mask_shuffle_pd`]
1298+
* [x] [`_mm_maskz_shuffle_pd`]
1299+
* [x] [`_mm256_mask_shuffle_pd`]
1300+
* [x] [`_mm256_maskz_shuffle_pd`]
1301+
* [x] [`_mm512_shuffle_i32x4`]
1302+
* [x] [`_mm512_mask_shuffle_i32x4`]
1303+
* [x] [`_mm256_mask_shuffle_i32x4`]
1304+
* [x] [`_mm256_maskz_shuffle_i32x4`]
1305+
* [x] [`_mm256_shuffle_i32x4`]
1306+
* [x] [`_mm512_shuffle_i64x2`]
1307+
* [x] [`_mm512_mask_shuffle_i64x2`]
1308+
* [x] [`_mm256_mask_shuffle_i64x2`]
1309+
* [x] [`_mm256_maskz_shuffle_i64x2`]
1310+
* [x] [`_mm256_shuffle_i64x2`]
1311+
* [x] [`_mm512_shuffle_f32x4`]
1312+
* [x] [`_mm512_mask_shuffle_f32x4`]
1313+
* [x] [`_mm256_mask_shuffle_f32x4`]
1314+
* [x] [`_mm256_maskz_shuffle_f32x4`]
1315+
* [x] [`_mm256_shuffle_f32x4`]
1316+
* [x] [`_mm512_shuffle_f64x2`]
1317+
* [x] [`_mm512_mask_shuffle_f64x2`]
1318+
* [x] [`_mm256_mask_shuffle_f64x2`]
1319+
* [x] [`_mm256_maskz_shuffle_f64x2`]
1320+
* [x] [`_mm256_shuffle_f64x2`]
11801321
* [x] [`_mm512_alignr_epi32`]
11811322
* [x] [`_mm512_mask_alignr_epi32`]
11821323
* [x] [`_mm512_maskz_alignr_epi32`]
1324+
* [x] [`_mm_alignr_epi32`]
1325+
* [x] [`_mm_mask_alignr_epi32`]
1326+
* [x] [`_mm_maskz_alignr_epi32`]
1327+
* [x] [`_mm256_alignr_epi32`]
1328+
* [x] [`_mm256_mask_alignr_epi32`]
1329+
* [x] [`_mm256_maskz_alignr_epi32`]
11831330
* [x] [`_mm512_alignr_epi64`]
11841331
* [x] [`_mm512_mask_alignr_epi64`]
11851332
* [x] [`_mm512_maskz_alignr_epi64`]
1333+
* [x] [`_mm_alignr_epi64`]
1334+
* [x] [`_mm_mask_alignr_epi64`]
1335+
* [x] [`_mm_maskz_alignr_epi64`]
1336+
* [x] [`_mm256_alignr_epi64`]
1337+
* [x] [`_mm256_mask_alignr_epi64`]
1338+
* [x] [`_mm256_maskz_alignr_epi64`]
11861339

1187-
* [x] [`_mm512_broadcast_f32x4`]
1188-
* [x] [`_mm512_broadcast_f64x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_broadcast_f64x4&expand=5236)
1189-
* [x] [`_mm512_broadcast_i32x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_broadcast_i32x4&expand=5236)
1190-
* [x] [`_mm512_broadcast_i64x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_broadcast_i64x4&expand=5236)
1191-
* [x] [`_mm512_broadcastd_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_broadcastd_epi32&expand=5236)
1192-
* [x] [`_mm512_broadcastq_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_broadcastq_epi64&expand=5236)
1193-
* [x] [`_mm512_broadcastsd_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_broadcastsd_pd&expand=5236)
1194-
* [x] [`_mm512_broadcastss_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_broadcastss_ps&expand=5236)
11951340
* [x] [`_mm512_castpd128_pd512`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_castpd128_pd512&expand=5236)
11961341
* [x] [`_mm512_castpd256_pd512`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_castpd256_pd512&expand=5236)
11971342
* [x] [`_mm512_castpd512_pd128`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_castpd512_pd128&expand=5236)
@@ -1330,20 +1475,8 @@
13301475
* [x] [`_mm512_mask2_permutex2var_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask2_permutex2var_pd&expand=5236)
13311476
* [x] [`_mm512_mask2_permutex2var_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask2_permutex2var_ps&expand=5236)
13321477
* [x] [`_mm512_mask2int`]
1333-
* [x] [`_mm512_mask_blend_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_blend_epi32&expand=5236)
1334-
* [x] [`_mm512_mask_blend_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_blend_epi64&expand=5236)
1335-
* [x] [`_mm512_mask_blend_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_blend_pd&expand=5236)
1336-
* [x] [`_mm512_mask_blend_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_blend_ps&expand=5236)
1337-
* [x] [`_mm512_mask_broadcast_f32x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_broadcast_f32x4&expand=5236)
1338-
* [x] [`_mm512_mask_broadcast_f64x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_broadcast_f64x4&expand=5236)
1339-
* [x] [`_mm512_mask_broadcast_i32x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_broadcast_i32x4&expand=5236)
1340-
* [x] [`_mm512_mask_broadcast_i64x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_broadcast_i64x4&expand=5236)
1341-
* [x] [`_mm512_mask_broadcastd_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_broadcastd_epi32&expand=5236)
1342-
* [x] [`_mm512_mask_broadcastq_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_broadcastq_epi64&expand=5236)
1343-
* [x] [`_mm512_mask_broadcastsd_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_broadcastsd_pd&expand=5236)
1344-
* [x] [`_mm512_mask_broadcastss_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_broadcastss_ps&expand=5236)
1345-
* [x] [`_mm512_mask_compress_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_compress_epi32&expand=5236)
1346-
* [x] [`_mm512_mask_compress_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_compress_epi64&expand=5236)
1478+
* [x] [`_mm512_mask_compress_epi32`]
1479+
* [x] [`_mm512_mask_compress_epi64`]
13471480
* [x] [`_mm512_mask_compress_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_compress_pd&expand=5236)
13481481
* [x] [`_mm512_mask_compress_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_compress_ps&expand=5236)
13491482
* [ ] [`_mm512_mask_compressstoreu_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_compressstoreu_epi32&expand=5236)
@@ -1492,13 +1625,6 @@
14921625
* [x] [`_mm512_mask_permutexvar_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutexvar_ps&expand=5236)
14931626
* [x] [`_mm512_mask_set1_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_set1_epi32&expand=5236)
14941627
* [x] [`_mm512_mask_set1_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_set1_epi64&expand=5236)
1495-
* [x] [`_mm512_mask_shuffle_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_shuffle_epi32&expand=5236)
1496-
* [x] [`_mm512_mask_shuffle_f32x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_shuffle_f32x4&expand=5236)
1497-
* [x] [`_mm512_mask_shuffle_f64x2`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_shuffle_f64x2&expand=5236)
1498-
* [x] [`_mm512_mask_shuffle_i32x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_shuffle_i32x4&expand=5236)
1499-
* [x] [`_mm512_mask_shuffle_i64x2`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_shuffle_i64x2&expand=5236)
1500-
* [x] [`_mm512_mask_shuffle_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_shuffle_pd&expand=5236)
1501-
* [x] [`_mm512_mask_shuffle_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_shuffle_ps&expand=5236)
15021628
* [ ] [`_mm512_mask_store_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_store_epi32&expand=5236)
15031629
* [ ] [`_mm512_mask_store_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_store_epi64&expand=5236)
15041630
* [ ] [`_mm512_mask_store_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_store_pd&expand=5236)
@@ -1513,22 +1639,6 @@
15131639
* [x] [`_mm512_mask_test_epi64_mask`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_test_epi64_mask&expand=5236)
15141640
* [x] [`_mm512_mask_testn_epi32_mask`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_testn_epi32_mask&expand=5236)
15151641
* [x] [`_mm512_mask_testn_epi64_mask`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_testn_epi64_mask&expand=5236)
1516-
* [x] [`_mm512_mask_unpackhi_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_unpackhi_epi32&expand=5236)
1517-
* [x] [`_mm512_mask_unpackhi_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_unpackhi_epi64&expand=5236)
1518-
* [x] [`_mm512_mask_unpackhi_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_unpackhi_pd&expand=5236)
1519-
* [x] [`_mm512_mask_unpackhi_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_unpackhi_ps&expand=5236)
1520-
* [x] [`_mm512_mask_unpacklo_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_unpacklo_epi32&expand=5236)
1521-
* [x] [`_mm512_mask_unpacklo_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_unpacklo_epi64&expand=5236)
1522-
* [x] [`_mm512_mask_unpacklo_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_unpacklo_pd&expand=5236)
1523-
* [x] [`_mm512_mask_unpacklo_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_unpacklo_ps&expand=5236)
1524-
* [x] [`_mm512_maskz_broadcast_f32x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_broadcast_f32x4&expand=5236)
1525-
* [x] [`_mm512_maskz_broadcast_f64x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_broadcast_f64x4&expand=5236)
1526-
* [x] [`_mm512_maskz_broadcast_i32x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_broadcast_i32x4&expand=5236)
1527-
* [x] [`_mm512_maskz_broadcast_i64x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_broadcast_i64x4&expand=5236)
1528-
* [x] [`_mm512_maskz_broadcastd_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_broadcastd_epi32&expand=5236)
1529-
* [x] [`_mm512_maskz_broadcastq_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_broadcastq_epi64&expand=5236)
1530-
* [x] [`_mm512_maskz_broadcastsd_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_broadcastsd_pd&expand=5236)
1531-
* [x] [`_mm512_maskz_broadcastss_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_broadcastss_ps&expand=5236)
15321642
* [x] [`_mm512_maskz_compress_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_compress_epi32&expand=5236)
15331643
* [x] [`_mm512_maskz_compress_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_compress_epi64&expand=5236)
15341644
* [x] [`_mm512_maskz_compress_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_compress_pd&expand=5236)
@@ -1680,22 +1790,15 @@
16801790
* [x] [`_mm512_setr4_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setr4_epi64&expand=5236)
16811791
* [x] [`_mm512_setr4_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setr4_pd&expand=5236)
16821792
* [x] [`_mm512_setr4_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setr4_ps&expand=5236)
1683-
* [x] [`_mm512_setr_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setr_epi32&expand=5236)
1684-
* [x] [`_mm512_setr_epi64`](https:/software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setr_epi64&expand=5236)
1685-
* [x] [`_mm512_setr_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setr_pd&expand=5236)
1686-
* [x] [`_mm512_setr_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setr_ps&expand=5236)
1687-
* [x] [`_mm512_setzero_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setzero_epi32&expand=5236)
1688-
* [x] [`_mm512_setzero_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setzero_pd&expand=5236)
1689-
* [x] [`_mm512_setzero_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setzero_ps&expand=5236)
1690-
* [x] [`_mm512_setzero_si512`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setzero_si512&expand=5236)
1691-
* [x] [`_mm512_setzero`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_setzero&expand=5236)
1692-
* [x] [`_mm512_shuffle_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_shuffle_epi32&expand=5236)
1693-
* [x] [`_mm512_shuffle_f32x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_shuffle_f32x4&expand=5236)
1694-
* [x] [`_mm512_shuffle_f64x2`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_shuffle_f64x2&expand=5236)
1695-
* [x] [`_mm512_shuffle_i32x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_shuffle_i32x4&expand=5236)
1696-
* [x] [`_mm512_shuffle_i64x2`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_shuffle_i64x2&expand=5236)
1697-
* [x] [`_mm512_shuffle_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_shuffle_pd&expand=5236)
1698-
* [x] [`_mm512_shuffle_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_shuffle_ps&expand=5236)
1793+
* [x] [`_mm512_setr_epi32`]
1794+
* [x] [`_mm512_setr_epi64`]
1795+
* [x] [`_mm512_setr_pd`]
1796+
* [x] [`_mm512_setr_ps`]
1797+
* [x] [`_mm512_setzero_epi32`]
1798+
* [x] [`_mm512_setzero_pd`]
1799+
* [x] [`_mm512_setzero_ps`]
1800+
* [x] [`_mm512_setzero_si512`]
1801+
* [x] [`_mm512_setzero`]
16991802
* [x] [`_mm512_store_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_store_epi32&expand=5236)
17001803
* [x] [`_mm512_store_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_store_epi64&expand=5236)
17011804
* [x] [`_mm512_store_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_store_pd&expand=5236)
@@ -1721,14 +1824,6 @@
17211824
* [x] [`_mm512_undefined_pd`]
17221825
* [x] [`_mm512_undefined_ps`]
17231826
* [x] [`_mm512_undefined`]
1724-
* [x] [`_mm512_unpackhi_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_unpackhi_epi32&expand=5236)
1725-
* [x] [`_mm512_unpackhi_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_unpackhi_epi64&expand=5236)
1726-
* [x] [`_mm512_unpackhi_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_unpackhi_pd&expand=5236)
1727-
* [x] [`_mm512_unpackhi_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_unpackhi_ps&expand=5236)
1728-
* [x] [`_mm512_unpacklo_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_unpacklo_epi32&expand=5236)
1729-
* [x] [`_mm512_unpacklo_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_unpacklo_epi64&expand=5236)
1730-
* [x] [`_mm512_unpacklo_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_unpacklo_pd&expand=5236)
1731-
* [x] [`_mm512_unpacklo_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_unpacklo_ps&expand=5236)
17321827
* [x] [`_mm512_zextpd128_pd512`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_zextpd128_pd512&expand=5236)
17331828
* [x] [`_mm512_zextpd256_pd512`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_zextpd256_pd512&expand=5236)
17341829
* [x] [`_mm512_zextps128_ps512`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_zextps128_ps512&expand=5236)

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