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Move vector combine intrisics to arm/neon.rs
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2 files changed

+171
-129
lines changed

2 files changed

+171
-129
lines changed

‎crates/core_arch/src/aarch64/neon/mod.rs

Lines changed: 0 additions & 129 deletions
Original file line numberDiff line numberDiff line change
@@ -1964,94 +1964,6 @@ pub unsafe fn vext_f64<const N: i32>(a: float64x1_t, _b: float64x1_t) -> float64
19641964
static_assert!(N : i32 where N == 0);
19651965
a
19661966
}
1967-
/// Vector combine
1968-
#[inline]
1969-
#[target_feature(enable = "neon")]
1970-
#[cfg_attr(test, assert_instr(mov))]
1971-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1972-
pub unsafe fn vcombine_s8(low: int8x8_t, high: int8x8_t) -> int8x16_t {
1973-
simd_shuffle16!(
1974-
low,
1975-
high,
1976-
[0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],
1977-
)
1978-
}
1979-
1980-
/// Vector combine
1981-
#[inline]
1982-
#[target_feature(enable = "neon")]
1983-
#[cfg_attr(test, assert_instr(mov))]
1984-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1985-
pub unsafe fn vcombine_s16(low: int16x4_t, high: int16x4_t) -> int16x8_t {
1986-
simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
1987-
}
1988-
1989-
/// Vector combine
1990-
#[inline]
1991-
#[target_feature(enable = "neon")]
1992-
#[cfg_attr(test, assert_instr(mov))]
1993-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1994-
pub unsafe fn vcombine_s32(low: int32x2_t, high: int32x2_t) -> int32x4_t {
1995-
simd_shuffle4!(low, high, [0, 1, 2, 3])
1996-
}
1997-
1998-
/// Vector combine
1999-
#[inline]
2000-
#[target_feature(enable = "neon")]
2001-
#[cfg_attr(test, assert_instr(mov))]
2002-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2003-
pub unsafe fn vcombine_s64(low: int64x1_t, high: int64x1_t) -> int64x2_t {
2004-
simd_shuffle2!(low, high, [0, 1])
2005-
}
2006-
2007-
/// Vector combine
2008-
#[inline]
2009-
#[target_feature(enable = "neon")]
2010-
#[cfg_attr(test, assert_instr(mov))]
2011-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2012-
pub unsafe fn vcombine_u8(low: uint8x8_t, high: uint8x8_t) -> uint8x16_t {
2013-
simd_shuffle16!(
2014-
low,
2015-
high,
2016-
[0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],
2017-
)
2018-
}
2019-
2020-
/// Vector combine
2021-
#[inline]
2022-
#[target_feature(enable = "neon")]
2023-
#[cfg_attr(test, assert_instr(mov))]
2024-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2025-
pub unsafe fn vcombine_u16(low: uint16x4_t, high: uint16x4_t) -> uint16x8_t {
2026-
simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
2027-
}
2028-
2029-
/// Vector combine
2030-
#[inline]
2031-
#[target_feature(enable = "neon")]
2032-
#[cfg_attr(test, assert_instr(mov))]
2033-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2034-
pub unsafe fn vcombine_u32(low: uint32x2_t, high: uint32x2_t) -> uint32x4_t {
2035-
simd_shuffle4!(low, high, [0, 1, 2, 3])
2036-
}
2037-
2038-
/// Vector combine
2039-
#[inline]
2040-
#[target_feature(enable = "neon")]
2041-
#[cfg_attr(test, assert_instr(mov))]
2042-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2043-
pub unsafe fn vcombine_u64(low: uint64x1_t, high: uint64x1_t) -> uint64x2_t {
2044-
simd_shuffle2!(low, high, [0, 1])
2045-
}
2046-
2047-
/// Vector combine
2048-
#[inline]
2049-
#[target_feature(enable = "neon")]
2050-
#[cfg_attr(test, assert_instr(mov))]
2051-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2052-
pub unsafe fn vcombine_p64(low: poly64x1_t, high: poly64x1_t) -> poly64x2_t {
2053-
simd_shuffle2!(low, high, [0, 1])
2054-
}
20551967

20561968
/// Duplicate vector element to vector or scalar
20571969
#[inline]
@@ -2183,47 +2095,6 @@ pub unsafe fn vgetq_lane_f64<const IMM5: i32>(v: float64x2_t) -> f64 {
21832095
simd_extract(v, IMM5 as u32)
21842096
}
21852097

2186-
/* FIXME: 16-bit float
2187-
/// Vector combine
2188-
#[inline]
2189-
#[target_feature(enable = "neon")]
2190-
#[cfg_attr(test, assert_instr(mov))]
2191-
pub unsafe fn vcombine_f16 ( low: float16x4_t, high: float16x4_t) -> float16x8_t {
2192-
simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
2193-
}
2194-
*/
2195-
2196-
/// Vector combine
2197-
#[inline]
2198-
#[target_feature(enable = "neon")]
2199-
#[cfg_attr(test, assert_instr(mov))]
2200-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2201-
pub unsafe fn vcombine_f32(low: float32x2_t, high: float32x2_t) -> float32x4_t {
2202-
simd_shuffle4!(low, high, [0, 1, 2, 3])
2203-
}
2204-
2205-
/// Vector combine
2206-
#[inline]
2207-
#[target_feature(enable = "neon")]
2208-
#[cfg_attr(test, assert_instr(mov))]
2209-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2210-
pub unsafe fn vcombine_p8(low: poly8x8_t, high: poly8x8_t) -> poly8x16_t {
2211-
simd_shuffle16!(
2212-
low,
2213-
high,
2214-
[0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],
2215-
)
2216-
}
2217-
2218-
/// Vector combine
2219-
#[inline]
2220-
#[target_feature(enable = "neon")]
2221-
#[cfg_attr(test, assert_instr(mov))]
2222-
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
2223-
pub unsafe fn vcombine_p16(low: poly16x4_t, high: poly16x4_t) -> poly16x8_t {
2224-
simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
2225-
}
2226-
22272098
/// Vector combine
22282099
#[inline]
22292100
#[target_feature(enable = "neon")]

‎crates/core_arch/src/arm_shared/neon/mod.rs

Lines changed: 171 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6915,6 +6915,177 @@ pub unsafe fn vusmmlaq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4
69156915
vusmmlaq_s32_(a, b, c)
69166916
}
69176917

6918+
/* FIXME: 16-bit float
6919+
/// Vector combine
6920+
#[inline]
6921+
#[target_feature(enable = "neon")]
6922+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6923+
#[cfg_attr(test, assert_instr(nop))]
6924+
pub unsafe fn vcombine_f16 ( low: float16x4_t, high: float16x4_t) -> float16x8_t {
6925+
simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
6926+
}
6927+
*/
6928+
6929+
/// Vector combine
6930+
#[inline]
6931+
#[target_feature(enable = "neon")]
6932+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6933+
#[cfg_attr(test, assert_instr(nop))]
6934+
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
6935+
pub unsafe fn vcombine_f32(low: float32x2_t, high: float32x2_t) -> float32x4_t {
6936+
simd_shuffle4!(low, high, [0, 1, 2, 3])
6937+
}
6938+
6939+
/// Vector combine
6940+
#[inline]
6941+
#[target_feature(enable = "neon")]
6942+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6943+
#[cfg_attr(test, assert_instr(nop))]
6944+
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
6945+
pub unsafe fn vcombine_p8(low: poly8x8_t, high: poly8x8_t) -> poly8x16_t {
6946+
simd_shuffle16!(
6947+
low,
6948+
high,
6949+
[0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],
6950+
)
6951+
}
6952+
6953+
/// Vector combine
6954+
#[inline]
6955+
#[target_feature(enable = "neon")]
6956+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6957+
#[cfg_attr(test, assert_instr(nop))]
6958+
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
6959+
pub unsafe fn vcombine_p16(low: poly16x4_t, high: poly16x4_t) -> poly16x8_t {
6960+
simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
6961+
}
6962+
6963+
/// Vector combine
6964+
#[inline]
6965+
#[target_feature(enable = "neon")]
6966+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6967+
#[cfg_attr(test, assert_instr(nop))]
6968+
#[cfg_attr(
6969+
target_arch = "aarch64",
6970+
stable(feature = "neon_intrinsics", since = "1.59.0")
6971+
)]
6972+
pub unsafe fn vcombine_s8(low: int8x8_t, high: int8x8_t) -> int8x16_t {
6973+
simd_shuffle16!(
6974+
low,
6975+
high,
6976+
[0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],
6977+
)
6978+
}
6979+
6980+
/// Vector combine
6981+
#[inline]
6982+
#[target_feature(enable = "neon")]
6983+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6984+
#[cfg_attr(test, assert_instr(nop))]
6985+
#[cfg_attr(
6986+
target_arch = "aarch64",
6987+
stable(feature = "neon_intrinsics", since = "1.59.0")
6988+
)]
6989+
pub unsafe fn vcombine_s16(low: int16x4_t, high: int16x4_t) -> int16x8_t {
6990+
simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
6991+
}
6992+
6993+
/// Vector combine
6994+
#[inline]
6995+
#[target_feature(enable = "neon")]
6996+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6997+
#[cfg_attr(test, assert_instr(nop))]
6998+
#[cfg_attr(
6999+
target_arch = "aarch64",
7000+
stable(feature = "neon_intrinsics", since = "1.59.0")
7001+
)]
7002+
pub unsafe fn vcombine_s32(low: int32x2_t, high: int32x2_t) -> int32x4_t {
7003+
simd_shuffle4!(low, high, [0, 1, 2, 3])
7004+
}
7005+
7006+
/// Vector combine
7007+
#[inline]
7008+
#[target_feature(enable = "neon")]
7009+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7010+
#[cfg_attr(test, assert_instr(nop))]
7011+
#[cfg_attr(
7012+
target_arch = "aarch64",
7013+
stable(feature = "neon_intrinsics", since = "1.59.0")
7014+
)]
7015+
pub unsafe fn vcombine_s64(low: int64x1_t, high: int64x1_t) -> int64x2_t {
7016+
simd_shuffle2!(low, high, [0, 1])
7017+
}
7018+
7019+
/// Vector combine
7020+
#[inline]
7021+
#[target_feature(enable = "neon")]
7022+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7023+
#[cfg_attr(test, assert_instr(nop))]
7024+
#[cfg_attr(
7025+
target_arch = "aarch64",
7026+
stable(feature = "neon_intrinsics", since = "1.59.0")
7027+
)]
7028+
pub unsafe fn vcombine_u8(low: uint8x8_t, high: uint8x8_t) -> uint8x16_t {
7029+
simd_shuffle16!(
7030+
low,
7031+
high,
7032+
[0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15],
7033+
)
7034+
}
7035+
7036+
/// Vector combine
7037+
#[inline]
7038+
#[target_feature(enable = "neon")]
7039+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7040+
#[cfg_attr(test, assert_instr(nop))]
7041+
#[cfg_attr(
7042+
target_arch = "aarch64",
7043+
stable(feature = "neon_intrinsics", since = "1.59.0")
7044+
)]
7045+
pub unsafe fn vcombine_u16(low: uint16x4_t, high: uint16x4_t) -> uint16x8_t {
7046+
simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7])
7047+
}
7048+
7049+
/// Vector combine
7050+
#[inline]
7051+
#[target_feature(enable = "neon")]
7052+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7053+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
7054+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mov))]
7055+
#[cfg_attr(
7056+
target_arch = "aarch64",
7057+
stable(feature = "neon_intrinsics", since = "1.59.0")
7058+
)]
7059+
pub unsafe fn vcombine_u32(low: uint32x2_t, high: uint32x2_t) -> uint32x4_t {
7060+
simd_shuffle4!(low, high, [0, 1, 2, 3])
7061+
}
7062+
7063+
/// Vector combine
7064+
#[inline]
7065+
#[target_feature(enable = "neon")]
7066+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7067+
#[cfg_attr(test, assert_instr(nop))]
7068+
#[cfg_attr(
7069+
target_arch = "aarch64",
7070+
stable(feature = "neon_intrinsics", since = "1.59.0")
7071+
)]
7072+
pub unsafe fn vcombine_u64(low: uint64x1_t, high: uint64x1_t) -> uint64x2_t {
7073+
simd_shuffle2!(low, high, [0, 1])
7074+
}
7075+
7076+
/// Vector combine
7077+
#[inline]
7078+
#[target_feature(enable = "neon")]
7079+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7080+
#[cfg_attr(test, assert_instr(nop))]
7081+
#[cfg_attr(
7082+
target_arch = "aarch64",
7083+
stable(feature = "neon_intrinsics", since = "1.59.0")
7084+
)]
7085+
pub unsafe fn vcombine_p64(low: poly64x1_t, high: poly64x1_t) -> poly64x2_t {
7086+
simd_shuffle2!(low, high, [0, 1])
7087+
}
7088+
69187089
#[cfg(test)]
69197090
mod tests {
69207091
use super::*;

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