Reorganize the x86/x86_64 intrinsic folders (#334)

The public API isn't changing in this commit but the internal organization is
being rejiggered. Instead of `x86/$subtarget/$feature.rs` the folders are
changed to `coresimd/x86/$feature.rs` and `coresimd/x86_64/$feature.rs`. The
`arch::x86_64` then reexports both the contents of the `x86` module and the
`x86_64` module.

Author: alexcrichton

coresimd/mod.rs

@@ -48,6 +48,7 @@ pub mod arch {
     #[cfg(target_arch = "x86_64")]
     pub mod x86_64 {
         pub use coresimd::x86::*;
+        pub use coresimd::x86_64::*;
     }
 
     /// Platform-specific intrinsics for the `arm` platform.
@@ -116,6 +117,8 @@ mod v16 {
 
 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 mod x86;
+#[cfg(target_arch = "x86_64")]
+mod x86_64;
 
 #[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
 mod arm;

coresimd/x86/i586/abm.rs renamed to coresimd/x86/abm.rs

@@ -42,15 +42,15 @@ pub unsafe fn _popcnt32(x: i32) -> i32 {
 mod tests {
     use stdsimd_test::simd_test;
 
-    use coresimd::x86::i586::abm;
+    use coresimd::x86::*;
 
     #[simd_test = "lzcnt"]
-    unsafe fn _lzcnt_u32() {
-        assert_eq!(abm::_lzcnt_u32(0b0101_1010), 25);
+    unsafe fn test_lzcnt_u32() {
+        assert_eq!(_lzcnt_u32(0b0101_1010), 25);
     }
 
     #[simd_test = "popcnt"]
-    unsafe fn _popcnt32() {
-        assert_eq!(abm::_popcnt32(0b0101_1010), 4);
+    unsafe fn test_popcnt32() {
+        assert_eq!(_popcnt32(0b0101_1010), 4);
     }
 }

coresimd/x86/i686/aes.rs renamed to coresimd/x86/aes.rs

@@ -96,59 +96,59 @@ extern "C" {
 mod tests {
     use stdsimd_test::simd_test;
 
-    use coresimd::x86::i586::bmi;
+    use coresimd::x86::*;
 
     #[simd_test = "bmi"]
-    unsafe fn _bextr_u32() {
-        let r = bmi::_bextr_u32(0b0101_0000u32, 4, 4);
+    unsafe fn test_bextr_u32() {
+        let r = _bextr_u32(0b0101_0000u32, 4, 4);
         assert_eq!(r, 0b0000_0101u32);
     }
 
     #[simd_test = "bmi"]
-    unsafe fn _andn_u32() {
-        assert_eq!(bmi::_andn_u32(0, 0), 0);
-        assert_eq!(bmi::_andn_u32(0, 1), 1);
-        assert_eq!(bmi::_andn_u32(1, 0), 0);
-        assert_eq!(bmi::_andn_u32(1, 1), 0);
+    unsafe fn test_andn_u32() {
+        assert_eq!(_andn_u32(0, 0), 0);
+        assert_eq!(_andn_u32(0, 1), 1);
+        assert_eq!(_andn_u32(1, 0), 0);
+        assert_eq!(_andn_u32(1, 1), 0);
 
-        let r = bmi::_andn_u32(0b0000_0000u32, 0b0000_0000u32);
+        let r = _andn_u32(0b0000_0000u32, 0b0000_0000u32);
         assert_eq!(r, 0b0000_0000u32);
 
-        let r = bmi::_andn_u32(0b0000_0000u32, 0b1111_1111u32);
+        let r = _andn_u32(0b0000_0000u32, 0b1111_1111u32);
         assert_eq!(r, 0b1111_1111u32);
 
-        let r = bmi::_andn_u32(0b1111_1111u32, 0b0000_0000u32);
+        let r = _andn_u32(0b1111_1111u32, 0b0000_0000u32);
         assert_eq!(r, 0b0000_0000u32);
 
-        let r = bmi::_andn_u32(0b1111_1111u32, 0b1111_1111u32);
+        let r = _andn_u32(0b1111_1111u32, 0b1111_1111u32);
         assert_eq!(r, 0b0000_0000u32);
 
-        let r = bmi::_andn_u32(0b0100_0000u32, 0b0101_1101u32);
+        let r = _andn_u32(0b0100_0000u32, 0b0101_1101u32);
         assert_eq!(r, 0b0001_1101u32);
     }
 
     #[simd_test = "bmi"]
-    unsafe fn _blsi_u32() {
-        assert_eq!(bmi::_blsi_u32(0b1101_0000u32), 0b0001_0000u32);
+    unsafe fn test_blsi_u32() {
+        assert_eq!(_blsi_u32(0b1101_0000u32), 0b0001_0000u32);
     }
 
     #[simd_test = "bmi"]
-    unsafe fn _blsmsk_u32() {
-        let r = bmi::_blsmsk_u32(0b0011_0000u32);
+    unsafe fn test_blsmsk_u32() {
+        let r = _blsmsk_u32(0b0011_0000u32);
         assert_eq!(r, 0b0001_1111u32);
     }
 
     #[simd_test = "bmi"]
-    unsafe fn _blsr_u32() {
+    unsafe fn test_blsr_u32() {
         // TODO: test the behavior when the input is 0
-        let r = bmi::_blsr_u32(0b0011_0000u32);
+        let r = _blsr_u32(0b0011_0000u32);
         assert_eq!(r, 0b0010_0000u32);
     }
 
     #[simd_test = "bmi"]
-    unsafe fn _tzcnt_u32() {
-        assert_eq!(bmi::_tzcnt_u32(0b0000_0001u32), 0u32);
-        assert_eq!(bmi::_tzcnt_u32(0b0000_0000u32), 32u32);
-        assert_eq!(bmi::_tzcnt_u32(0b1001_0000u32), 4u32);
+    unsafe fn test_tzcnt_u32() {
+        assert_eq!(_tzcnt_u32(0b0000_0001u32), 0u32);
+        assert_eq!(_tzcnt_u32(0b0000_0000u32), 32u32);
+        assert_eq!(_tzcnt_u32(0b1001_0000u32), 4u32);
     }
 }

coresimd/x86/i586/avx.rs renamed to coresimd/x86/avx.rs

@@ -67,10 +67,10 @@ extern "C" {
 mod tests {
     use stdsimd_test::simd_test;
 
-    use coresimd::x86::i586::bmi2;
+    use coresimd::x86::*;
 
     #[simd_test = "bmi2"]
-    unsafe fn _pext_u32() {
+    unsafe fn test_pext_u32() {
         let n = 0b1011_1110_1001_0011u32;
 
         let m0 = 0b0110_0011_1000_0101u32;
@@ -79,12 +79,12 @@ mod tests {
         let m1 = 0b1110_1011_1110_1111u32;
         let s1 = 0b0001_0111_0100_0011u32;
 
-        assert_eq!(bmi2::_pext_u32(n, m0), s0);
-        assert_eq!(bmi2::_pext_u32(n, m1), s1);
+        assert_eq!(_pext_u32(n, m0), s0);
+        assert_eq!(_pext_u32(n, m1), s1);
     }
 
     #[simd_test = "bmi2"]
-    unsafe fn _pdep_u32() {
+    unsafe fn test_pdep_u32() {
         let n = 0b1011_1110_1001_0011u32;
 
         let m0 = 0b0110_0011_1000_0101u32;
@@ -93,23 +93,23 @@ mod tests {
         let m1 = 0b1110_1011_1110_1111u32;
         let s1 = 0b1110_1001_0010_0011u32;
 
-        assert_eq!(bmi2::_pdep_u32(n, m0), s0);
-        assert_eq!(bmi2::_pdep_u32(n, m1), s1);
+        assert_eq!(_pdep_u32(n, m0), s0);
+        assert_eq!(_pdep_u32(n, m1), s1);
     }
 
     #[simd_test = "bmi2"]
-    unsafe fn _bzhi_u32() {
+    unsafe fn test_bzhi_u32() {
         let n = 0b1111_0010u32;
         let s = 0b0001_0010u32;
-        assert_eq!(bmi2::_bzhi_u32(n, 5), s);
+        assert_eq!(_bzhi_u32(n, 5), s);
     }
 
     #[simd_test = "bmi2"]
-    unsafe fn _mulx_u32() {
+    unsafe fn test_mulx_u32() {
         let a: u32 = 4_294_967_200;
         let b: u32 = 2;
         let mut hi = 0;
-        let lo = bmi2::_mulx_u32(a, b, &mut hi);
+        let lo = _mulx_u32(a, b, &mut hi);
         /*
 result = 8589934400
        = 0b0001_1111_1111_1111_1111_1111_1111_0100_0000u64

coresimd/x86/i586/avx2.rs renamed to coresimd/x86/avx2.rs

@@ -79,7 +79,7 @@ pub fn has_cpuid() -> bool {
     }
     #[cfg(target_arch = "x86")]
     {
-        use coresimd::x86::i386::{__readeflags, __writeeflags};
+        use coresimd::x86::{__readeflags, __writeeflags};
 
         // On `x86` the `cpuid` instruction is not always available.
         // This follows the approach indicated in:
@@ -121,7 +121,7 @@ pub unsafe fn __get_cpuid_max(leaf: u32) -> (u32, u32) {
 
 #[cfg(test)]
 mod tests {
-    use coresimd::x86::i586::cpuid;
+    use coresimd::x86::*;
 
     #[test]
     fn test_always_has_cpuid() {
@@ -133,7 +133,6 @@ mod tests {
     #[cfg(target_arch = "x86")]
     #[test]
     fn test_has_cpuid() {
-        use coresimd::x86::i386::__readeflags;
         unsafe {
             let before = __readeflags();
 

coresimd/x86/i586/bmi.rs renamed to coresimd/x86/bmi.rs

@@ -34,7 +34,7 @@ pub unsafe fn __writeeflags(eflags: u64) {
 
 #[cfg(test)]
 mod tests {
-    use coresimd::x86::i386::*;
+    use coresimd::x86::*;
 
     #[test]
     fn test_eflags() {