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pclmul -> pclmulqdq
1 parent 5b3ecbd commit 51b22a5

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3 files changed

+11
-11
lines changed

3 files changed

+11
-11
lines changed

coresimd/src/runtime/x86.rs

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -32,9 +32,9 @@ macro_rules! __unstable_detect_feature {
3232
("aes", $unstable_detect_feature:path) => {
3333
$unstable_detect_feature(
3434
$crate::__vendor_runtime::__Feature::aes{}) };
35-
("pclmul", $unstable_detect_feature:path) => {
35+
("pclmulqdq", $unstable_detect_feature:path) => {
3636
$unstable_detect_feature(
37-
$crate::__vendor_runtime::__Feature::pclmul{}) };
37+
$crate::__vendor_runtime::__Feature::pclmulqdq{}) };
3838
("tsc", $unstable_detect_feature:path) => {
3939
$unstable_detect_feature(
4040
$crate::__vendor_runtime::__Feature::tsc{}) };
@@ -180,7 +180,7 @@ pub enum __Feature {
180180
/// AES (Advanced Encryption Standard New Instructions AES-NI)
181181
aes,
182182
/// CLMUL (Carry-less Multiplication)
183-
pclmul,
183+
pclmulqdq,
184184
/// TSC (Time Stamp Counter)
185185
tsc,
186186
/// MMX
@@ -356,7 +356,7 @@ pub fn detect_features() -> cache::Initializer {
356356
enable(proc_info_ecx, 20, __Feature::sse4_2);
357357
enable(proc_info_ecx, 23, __Feature::popcnt);
358358
enable(proc_info_ecx, 25, __Feature::aes);
359-
enable(proc_info_ecx, 1, __Feature::pclmul);
359+
enable(proc_info_ecx, 1, __Feature::pclmulqdq);
360360
enable(proc_info_edx, 4, __Feature::tsc);
361361
enable(proc_info_edx, 23, __Feature::mmx);
362362
enable(proc_info_edx, 24, __Feature::fxsr);
@@ -469,7 +469,7 @@ mod tests {
469469
#[test]
470470
fn dump() {
471471
println!("aes: {:?}", cfg_feature_enabled!("aes"));
472-
println!("pclmul: {:?}", cfg_feature_enabled!("pclmul"));
472+
println!("pclmulqdq: {:?}", cfg_feature_enabled!("pclmulqdq"));
473473
println!("tsc: {:?}", cfg_feature_enabled!("tsc"));
474474
println!("sse: {:?}", cfg_feature_enabled!("sse"));
475475
println!("sse2: {:?}", cfg_feature_enabled!("sse2"));
@@ -511,7 +511,7 @@ mod tests {
511511
fn compare_with_cupid() {
512512
let information = cupid::master().unwrap();
513513
assert_eq!(cfg_feature_enabled!("aes"), information.aesni());
514-
assert_eq!(cfg_feature_enabled!("pclmul"), information.pclmulqdq());
514+
assert_eq!(cfg_feature_enabled!("pclmulqdq"), information.pclmulqdq());
515515
assert_eq!(cfg_feature_enabled!("tsc"), information.tsc());
516516
assert_eq!(cfg_feature_enabled!("sse"), information.sse());
517517
assert_eq!(cfg_feature_enabled!("sse2"), information.sse2());

coresimd/src/x86/i686/mod.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3,12 +3,12 @@
33
mod aes;
44
pub use self::aes::*;
55

6-
mod clmul;
7-
pub use self::clmul::*;
8-
96
mod mmx;
107
pub use self::mmx::*;
118

9+
mod pclmulqdq;
10+
pub use self::pclmulqdq::*;
11+
1212
mod sse;
1313
pub use self::sse::*;
1414

coresimd/src/x86/i686/clmul.rs renamed to coresimd/src/x86/i686/pclmulqdq.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ extern "C" {
2121
/// The immediate byte is used for determining which halves of `a` and `b`
2222
/// should be used. Immediate bits other than 0 and 4 are ignored.
2323
#[inline]
24-
#[target_feature(enable = "pclmul")]
24+
#[target_feature(enable = "pclmulqdq")]
2525
#[cfg_attr(test, assert_instr(pclmulqdq, imm8 = 0))]
2626
pub unsafe fn _mm_clmulepi64_si128(a: __m128i, b: __m128i, imm8: u8) -> __m128i {
2727
macro_rules! call {
@@ -42,7 +42,7 @@ mod tests {
4242

4343
use x86::*;
4444

45-
#[simd_test = "pclmul"]
45+
#[simd_test = "pclmulqdq"]
4646
unsafe fn test_mm_clmulepi64_si128() {
4747
// Constants taken from https://software.intel.com/sites/default/files/managed/72/cc/clmul-wp-rev-2.02-2014-04-20.pdf
4848
let a = _mm_set_epi64x(0x7b5b546573745665, 0x63746f725d53475d);

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