use rustc reductions

Author: gnzlbg

coresimd/ppsv/api/arithmetic_reductions.rs

@@ -7,12 +7,18 @@ macro_rules! impl_arithmetic_reductions {
             /// Lane-wise addition of the vector elements.
             #[inline]
             pub fn sum(self) -> $elem_ty {
-                super::codegen::sum::ReduceAdd::reduce_add(self)
+                use ::coresimd::simd_llvm::simd_reduce_add_ordered;
+                unsafe {
+                    simd_reduce_add_ordered(self, 0 as $elem_ty)
+                }
             }
             /// Lane-wise multiplication of the vector elements.
             #[inline]
             pub fn product(self) -> $elem_ty {
-                super::codegen::product::ReduceMul::reduce_mul(self)
+                use ::coresimd::simd_llvm::simd_reduce_mul_ordered;
+                unsafe {
+                    simd_reduce_add_ordered(self, 1 as $elem_ty)
+                }
             }
         }
     }

coresimd/ppsv/api/bitwise_reductions.rs

@@ -7,17 +7,26 @@ macro_rules! impl_bitwise_reductions {
             /// Lane-wise bitwise `and` of the vector elements.
             #[inline]
             pub fn and(self) -> $elem_ty {
-                super::codegen::and::ReduceAnd::reduce_and(self)
+                use ::coresimd::simd_llvm::simd_reduce_and;
+                unsafe {
+                    simd_reduce_and(self)
+                }
             }
             /// Lane-wise bitwise `or` of the vector elements.
             #[inline]
             pub fn or(self) -> $elem_ty {
-                super::codegen::or::ReduceOr::reduce_or(self)
+                use ::coresimd::simd_llvm::simd_reduce_or;
+                unsafe {
+                    simd_reduce_or(self)
+                }
             }
             /// Lane-wise bitwise `xor` of the vector elements.
             #[inline]
             pub fn xor(self) -> $elem_ty {
-                super::codegen::xor::ReduceXor::reduce_xor(self)
+                use ::coresimd::simd_llvm::simd_reduce_xor;
+                unsafe {
+                    simd_reduce_xor(self)
+                }
             }
         }
     }
@@ -29,17 +38,26 @@ macro_rules! impl_bool_bitwise_reductions {
             /// Lane-wise bitwise `and` of the vector elements.
             #[inline]
             pub fn and(self) -> $elem_ty {
-                super::codegen::and::ReduceAnd::reduce_and(self) !=0
+                use ::coresimd::simd_llvm::simd_reduce_and;
+                unsafe {
+                    simd_reduce_and(self) != 0
+                }
             }
             /// Lane-wise bitwise `or` of the vector elements.
             #[inline]
             pub fn or(self) -> $elem_ty {
-                super::codegen::or::ReduceOr::reduce_or(self) != 0
+                use ::coresimd::simd_llvm::simd_reduce_or;
+                unsafe {
+                    simd_reduce_or(self) != 0
+                }
             }
             /// Lane-wise bitwise `xor` of the vector elements.
             #[inline]
             pub fn xor(self) -> $elem_ty {
-                super::codegen::xor::ReduceXor::reduce_xor(self) != 0
+                use ::coresimd::simd_llvm::simd_reduce_xor;
+                unsafe {
+                    simd_reduce_xor(self) != 0
+                }
             }
         }
     }

coresimd/ppsv/api/boolean_reductions.rs

@@ -7,17 +7,23 @@ macro_rules! impl_bool_reductions {
             /// Are `all` vector lanes `true`?
             #[inline]
             pub fn all(self) -> bool {
-                self.and()
+                use ::coresimd::simd_llvm::simd_reduce_all;
+                unsafe {
+                    simd_reduce_all(self)
+                }
             }
             /// Is `any` vector lanes `true`?
             #[inline]
             pub fn any(self) -> bool {
-                self.or()
+                use ::coresimd::simd_llvm::simd_reduce_any;
+                unsafe {
+                    simd_reduce_any(self)
+                }
             }
             /// Are `all` vector lanes `false`?
             #[inline]
             pub fn none(self) -> bool {
-                !self.or()
+                !self.any()
             }
         }
     }

coresimd/ppsv/api/minmax_reductions.rs

@@ -7,12 +7,18 @@ macro_rules! impl_minmax_reductions {
             /// Largest vector value.
             #[inline]
             pub fn max(self) -> $elem_ty {
-                super::codegen::max::ReduceMax::reduce_max(self)
+                use ::coresimd::simd_llvm::simd_reduce_max;
+                unsafe {
+                    simd_reduce_max(self)
+                }
             }
             /// Smallest vector value.
             #[inline]
             pub fn min(self) -> $elem_ty {
-                super::codegen::min::ReduceMin::reduce_min(self)
+                use ::coresimd::simd_llvm::simd_reduce_min;
+                unsafe {
+                    simd_reduce_min(self)
+                }
             }
         }
     }