Skip to content

Commit 7091896

Browse files
AmanieuAmanieu
committed
Fix stability attributes for ARM crypto intrinsics
1 parent a83c899 commit 7091896

File tree

2 files changed

+78
-56
lines changed

2 files changed

+78
-56
lines changed

‎crates/core_arch/src/arm_shared/crypto.rs

Lines changed: 70 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -58,12 +58,13 @@ use stdarch_test::assert_instr;
5858
#[target_feature(enable = "aes")]
5959
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
6060
#[cfg_attr(test, assert_instr(aese))]
61+
#[cfg_attr(
62+
target_arch = "arm",
63+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
64+
)]
6165
#[cfg_attr(
6266
not(target_arch = "arm"),
63-
stable(
64-
feature = "aarch64_neon_crypto_intrinsics",
65-
since = "CURRENT_RUSTC_VERSION"
66-
)
67+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
6768
)]
6869
pub unsafe fn vaeseq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
6970
vaeseq_u8_(data, key)
@@ -76,12 +77,13 @@ pub unsafe fn vaeseq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
7677
#[target_feature(enable = "aes")]
7778
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
7879
#[cfg_attr(test, assert_instr(aesd))]
80+
#[cfg_attr(
81+
target_arch = "arm",
82+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
83+
)]
7984
#[cfg_attr(
8085
not(target_arch = "arm"),
81-
stable(
82-
feature = "aarch64_neon_crypto_intrinsics",
83-
since = "CURRENT_RUSTC_VERSION"
84-
)
86+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
8587
)]
8688
pub unsafe fn vaesdq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
8789
vaesdq_u8_(data, key)
@@ -94,12 +96,13 @@ pub unsafe fn vaesdq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
9496
#[target_feature(enable = "aes")]
9597
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
9698
#[cfg_attr(test, assert_instr(aesmc))]
99+
#[cfg_attr(
100+
target_arch = "arm",
101+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
102+
)]
97103
#[cfg_attr(
98104
not(target_arch = "arm"),
99-
stable(
100-
feature = "aarch64_neon_crypto_intrinsics",
101-
since = "CURRENT_RUSTC_VERSION"
102-
)
105+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
103106
)]
104107
pub unsafe fn vaesmcq_u8(data: uint8x16_t) -> uint8x16_t {
105108
vaesmcq_u8_(data)
@@ -112,12 +115,13 @@ pub unsafe fn vaesmcq_u8(data: uint8x16_t) -> uint8x16_t {
112115
#[target_feature(enable = "aes")]
113116
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
114117
#[cfg_attr(test, assert_instr(aesimc))]
118+
#[cfg_attr(
119+
target_arch = "arm",
120+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
121+
)]
115122
#[cfg_attr(
116123
not(target_arch = "arm"),
117-
stable(
118-
feature = "aarch64_neon_crypto_intrinsics",
119-
since = "CURRENT_RUSTC_VERSION"
120-
)
124+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
121125
)]
122126
pub unsafe fn vaesimcq_u8(data: uint8x16_t) -> uint8x16_t {
123127
vaesimcq_u8_(data)
@@ -130,12 +134,13 @@ pub unsafe fn vaesimcq_u8(data: uint8x16_t) -> uint8x16_t {
130134
#[target_feature(enable = "sha2")]
131135
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
132136
#[cfg_attr(test, assert_instr(sha1h))]
137+
#[cfg_attr(
138+
target_arch = "arm",
139+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
140+
)]
133141
#[cfg_attr(
134142
not(target_arch = "arm"),
135-
stable(
136-
feature = "aarch64_neon_crypto_intrinsics",
137-
since = "CURRENT_RUSTC_VERSION"
138-
)
143+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
139144
)]
140145
pub unsafe fn vsha1h_u32(hash_e: u32) -> u32 {
141146
vsha1h_u32_(hash_e)
@@ -148,12 +153,13 @@ pub unsafe fn vsha1h_u32(hash_e: u32) -> u32 {
148153
#[target_feature(enable = "sha2")]
149154
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
150155
#[cfg_attr(test, assert_instr(sha1c))]
156+
#[cfg_attr(
157+
target_arch = "arm",
158+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
159+
)]
151160
#[cfg_attr(
152161
not(target_arch = "arm"),
153-
stable(
154-
feature = "aarch64_neon_crypto_intrinsics",
155-
since = "CURRENT_RUSTC_VERSION"
156-
)
162+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
157163
)]
158164
pub unsafe fn vsha1cq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t {
159165
vsha1cq_u32_(hash_abcd, hash_e, wk)
@@ -166,12 +172,13 @@ pub unsafe fn vsha1cq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) ->
166172
#[target_feature(enable = "sha2")]
167173
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
168174
#[cfg_attr(test, assert_instr(sha1m))]
175+
#[cfg_attr(
176+
target_arch = "arm",
177+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
178+
)]
169179
#[cfg_attr(
170180
not(target_arch = "arm"),
171-
stable(
172-
feature = "aarch64_neon_crypto_intrinsics",
173-
since = "CURRENT_RUSTC_VERSION"
174-
)
181+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
175182
)]
176183
pub unsafe fn vsha1mq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t {
177184
vsha1mq_u32_(hash_abcd, hash_e, wk)
@@ -184,12 +191,13 @@ pub unsafe fn vsha1mq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) ->
184191
#[target_feature(enable = "sha2")]
185192
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
186193
#[cfg_attr(test, assert_instr(sha1p))]
194+
#[cfg_attr(
195+
target_arch = "arm",
196+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
197+
)]
187198
#[cfg_attr(
188199
not(target_arch = "arm"),
189-
stable(
190-
feature = "aarch64_neon_crypto_intrinsics",
191-
since = "CURRENT_RUSTC_VERSION"
192-
)
200+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
193201
)]
194202
pub unsafe fn vsha1pq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) -> uint32x4_t {
195203
vsha1pq_u32_(hash_abcd, hash_e, wk)
@@ -202,12 +210,13 @@ pub unsafe fn vsha1pq_u32(hash_abcd: uint32x4_t, hash_e: u32, wk: uint32x4_t) ->
202210
#[target_feature(enable = "sha2")]
203211
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
204212
#[cfg_attr(test, assert_instr(sha1su0))]
213+
#[cfg_attr(
214+
target_arch = "arm",
215+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
216+
)]
205217
#[cfg_attr(
206218
not(target_arch = "arm"),
207-
stable(
208-
feature = "aarch64_neon_crypto_intrinsics",
209-
since = "CURRENT_RUSTC_VERSION"
210-
)
219+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
211220
)]
212221
pub unsafe fn vsha1su0q_u32(w0_3: uint32x4_t, w4_7: uint32x4_t, w8_11: uint32x4_t) -> uint32x4_t {
213222
vsha1su0q_u32_(w0_3, w4_7, w8_11)
@@ -220,12 +229,13 @@ pub unsafe fn vsha1su0q_u32(w0_3: uint32x4_t, w4_7: uint32x4_t, w8_11: uint32x4_
220229
#[target_feature(enable = "sha2")]
221230
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
222231
#[cfg_attr(test, assert_instr(sha1su1))]
232+
#[cfg_attr(
233+
target_arch = "arm",
234+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
235+
)]
223236
#[cfg_attr(
224237
not(target_arch = "arm"),
225-
stable(
226-
feature = "aarch64_neon_crypto_intrinsics",
227-
since = "CURRENT_RUSTC_VERSION"
228-
)
238+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
229239
)]
230240
pub unsafe fn vsha1su1q_u32(tw0_3: uint32x4_t, w12_15: uint32x4_t) -> uint32x4_t {
231241
vsha1su1q_u32_(tw0_3, w12_15)
@@ -238,12 +248,13 @@ pub unsafe fn vsha1su1q_u32(tw0_3: uint32x4_t, w12_15: uint32x4_t) -> uint32x4_t
238248
#[target_feature(enable = "sha2")]
239249
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
240250
#[cfg_attr(test, assert_instr(sha256h))]
251+
#[cfg_attr(
252+
target_arch = "arm",
253+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
254+
)]
241255
#[cfg_attr(
242256
not(target_arch = "arm"),
243-
stable(
244-
feature = "aarch64_neon_crypto_intrinsics",
245-
since = "CURRENT_RUSTC_VERSION"
246-
)
257+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
247258
)]
248259
pub unsafe fn vsha256hq_u32(
249260
hash_abcd: uint32x4_t,
@@ -260,12 +271,13 @@ pub unsafe fn vsha256hq_u32(
260271
#[target_feature(enable = "sha2")]
261272
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
262273
#[cfg_attr(test, assert_instr(sha256h2))]
274+
#[cfg_attr(
275+
target_arch = "arm",
276+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
277+
)]
263278
#[cfg_attr(
264279
not(target_arch = "arm"),
265-
stable(
266-
feature = "aarch64_neon_crypto_intrinsics",
267-
since = "CURRENT_RUSTC_VERSION"
268-
)
280+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
269281
)]
270282
pub unsafe fn vsha256h2q_u32(
271283
hash_efgh: uint32x4_t,
@@ -282,12 +294,13 @@ pub unsafe fn vsha256h2q_u32(
282294
#[target_feature(enable = "sha2")]
283295
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
284296
#[cfg_attr(test, assert_instr(sha256su0))]
297+
#[cfg_attr(
298+
target_arch = "arm",
299+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
300+
)]
285301
#[cfg_attr(
286302
not(target_arch = "arm"),
287-
stable(
288-
feature = "aarch64_neon_crypto_intrinsics",
289-
since = "CURRENT_RUSTC_VERSION"
290-
)
303+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
291304
)]
292305
pub unsafe fn vsha256su0q_u32(w0_3: uint32x4_t, w4_7: uint32x4_t) -> uint32x4_t {
293306
vsha256su0q_u32_(w0_3, w4_7)
@@ -300,12 +313,13 @@ pub unsafe fn vsha256su0q_u32(w0_3: uint32x4_t, w4_7: uint32x4_t) -> uint32x4_t
300313
#[target_feature(enable = "sha2")]
301314
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
302315
#[cfg_attr(test, assert_instr(sha256su1))]
316+
#[cfg_attr(
317+
target_arch = "arm",
318+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
319+
)]
303320
#[cfg_attr(
304321
not(target_arch = "arm"),
305-
stable(
306-
feature = "aarch64_neon_crypto_intrinsics",
307-
since = "CURRENT_RUSTC_VERSION"
308-
)
322+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
309323
)]
310324
pub unsafe fn vsha256su1q_u32(
311325
tw0_3: uint32x4_t,

‎crates/core_arch/src/arm_shared/mod.rs

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,14 @@ mod crypto;
7171
// NEON intrinsics are currently broken on big-endian, so don't expose them. (#1484)
7272
#[cfg(target_endian = "little")]
7373
#[cfg(any(target_arch = "aarch64", target_feature = "v7", doc))]
74+
#[cfg_attr(
75+
target_arch = "arm",
76+
unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
77+
)]
78+
#[cfg_attr(
79+
not(target_arch = "arm"),
80+
stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
81+
)]
7482
pub use self::crypto::*;
7583

7684
// NEON intrinsics are currently broken on big-endian, so don't expose them. (#1484)

0 commit comments

Comments
 (0)