Fix bug in stdarch-test and nop intrinsics

Author: Licenser

crates/core_arch/src/arm/neon/mod.rs

@@ -1274,9 +1274,7 @@ pub unsafe fn vmovq_n_u8(value: u8) -> uint8x16_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-// This doesn't actually has an assembly instruction but simdarch-verify
-//requires it to have one ... it's a function so it returns.
-#[cfg_attr(test, assert_instr(ret))]
+#[cfg_attr(test, assert_instr(nop))]
 pub unsafe fn vreinterpret_u64_u32(a: uint32x2_t) -> uint64x1_t {
     transmute(a)
 }
@@ -1285,9 +1283,7 @@ pub unsafe fn vreinterpret_u64_u32(a: uint32x2_t) -> uint64x1_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-// This doesn't actually has an assembly instruction but simdarch-verify
-//requires it to have one ... it's a function so it returns.
-#[cfg_attr(test, assert_instr(ret))]
+#[cfg_attr(test, assert_instr(nop))]
 pub unsafe fn vreinterpretq_s8_u8(a: uint8x16_t) -> int8x16_t {
     transmute(a)
 }
@@ -1296,9 +1292,7 @@ pub unsafe fn vreinterpretq_s8_u8(a: uint8x16_t) -> int8x16_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-// This doesn't actually has an assembly instruction but simdarch-verify
-//requires it to have one ... it's a function so it returns.
-#[cfg_attr(test, assert_instr(ret))]
+#[cfg_attr(test, assert_instr(nop))]
 pub unsafe fn vreinterpretq_u16_u8(a: uint8x16_t) -> uint16x8_t {
     transmute(a)
 }
@@ -1307,9 +1301,7 @@ pub unsafe fn vreinterpretq_u16_u8(a: uint8x16_t) -> uint16x8_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-// This doesn't actually has an assembly instruction but simdarch-verify
-//requires it to have one ... it's a function so it returns.
-#[cfg_attr(test, assert_instr(ret))]
+#[cfg_attr(test, assert_instr(nop))]
 pub unsafe fn vreinterpretq_u32_u8(a: uint8x16_t) -> uint32x4_t {
     transmute(a)
 }
@@ -1318,9 +1310,7 @@ pub unsafe fn vreinterpretq_u32_u8(a: uint8x16_t) -> uint32x4_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-// This doesn't actually has an assembly instruction but simdarch-verify
-//requires it to have one ... it's a function so it returns.
-#[cfg_attr(test, assert_instr(ret))]
+#[cfg_attr(test, assert_instr(nop))]
 pub unsafe fn vreinterpretq_u64_u8(a: uint8x16_t) -> uint64x2_t {
     transmute(a)
 }
@@ -1329,9 +1319,7 @@ pub unsafe fn vreinterpretq_u64_u8(a: uint8x16_t) -> uint64x2_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-// This doesn't actually has an assembly instruction but simdarch-verify
-//requires it to have one ... it's a function so it returns.
-#[cfg_attr(test, assert_instr(ret))]
+#[cfg_attr(test, assert_instr(nop))]
 pub unsafe fn vreinterpretq_u8_s8(a: int8x16_t) -> uint8x16_t {
     transmute(a)
 }

crates/stdarch-test/src/lib.rs

@@ -88,6 +88,12 @@ pub fn assert(_fnptr: usize, fnname: &str, expected: &str) {
         instrs = &instrs[..instrs.len() - 1];
     }
 
+    // If the expected intrinsic is a nop it is compiled away so we
+    // can't check for it - aka the intrinsic is not generating any code
+    if expected == "nop" {
+        return;
+    }
+
     // Look for `expected` as the first part of any instruction in this
     // function, e.g., tzcntl in tzcntl %rax,%rax.
     let found = instrs.iter().any(|s| s.starts_with(expected));