Skip to content

Commit 8d2b298

Browse files
eduardosmAmanieu
authored andcommitted
Add #[cfg_attr(miri, ignore)] to SSE and SSE2 that cannot be supported by Miri
1 parent b3f7961 commit 8d2b298

File tree

3 files changed

+28
-0
lines changed

3 files changed

+28
-0
lines changed

crates/core_arch/src/x86/sse.rs

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2848,6 +2848,7 @@ mod tests {
28482848

28492849
#[allow(deprecated)] // FIXME: This test uses deprecated CSR access functions
28502850
#[simd_test(enable = "sse")]
2851+
#[cfg_attr(miri, ignore)] // Uses _mm_setcsr, which is not supported by Miri
28512852
unsafe fn test_mm_comieq_ss_vs_ucomieq_ss() {
28522853
// If one of the arguments is a quiet NaN `comieq_ss` should signal an
28532854
// Invalid Operation Exception while `ucomieq_ss` should not.
@@ -3267,12 +3268,15 @@ mod tests {
32673268
}
32683269

32693270
#[simd_test(enable = "sse")]
3271+
// Miri cannot support this until it is clear how it fits in the Rust memory model
3272+
#[cfg_attr(miri, ignore)]
32703273
unsafe fn test_mm_sfence() {
32713274
_mm_sfence();
32723275
}
32733276

32743277
#[allow(deprecated)] // FIXME: This tests functions that are immediate UB
32753278
#[simd_test(enable = "sse")]
3279+
#[cfg_attr(miri, ignore)] // Miri does not support accesing the CSR
32763280
unsafe fn test_mm_getcsr_setcsr_1() {
32773281
let saved_csr = _mm_getcsr();
32783282

@@ -3290,6 +3294,7 @@ mod tests {
32903294

32913295
#[allow(deprecated)] // FIXME: This tests functions that are immediate UB
32923296
#[simd_test(enable = "sse")]
3297+
#[cfg_attr(miri, ignore)] // Miri does not support accesing the CSR
32933298
unsafe fn test_mm_getcsr_setcsr_2() {
32943299
// Same as _mm_setcsr_1 test, but with opposite flag value.
32953300

@@ -3309,6 +3314,7 @@ mod tests {
33093314

33103315
#[allow(deprecated)] // FIXME: This tests functions that are immediate UB
33113316
#[simd_test(enable = "sse")]
3317+
#[cfg_attr(miri, ignore)] // Miri does not support accesing the CSR
33123318
unsafe fn test_mm_getcsr_setcsr_underflow() {
33133319
_MM_SET_EXCEPTION_STATE(0);
33143320

@@ -3347,6 +3353,9 @@ mod tests {
33473353
}
33483354

33493355
#[simd_test(enable = "sse")]
3356+
// Miri cannot support this until it is clear how it fits in the Rust memory model
3357+
// (non-temporal store)
3358+
#[cfg_attr(miri, ignore)]
33503359
unsafe fn test_mm_stream_ps() {
33513360
let a = _mm_set1_ps(7.0);
33523361
let mut mem = Memory { data: [-1.0; 4] };

crates/core_arch/src/x86/sse2.rs

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2956,11 +2956,15 @@ mod tests {
29562956
}
29572957

29582958
#[simd_test(enable = "sse2")]
2959+
// Miri cannot support this until it is clear how it fits in the Rust memory model
2960+
#[cfg_attr(miri, ignore)]
29592961
unsafe fn test_mm_lfence() {
29602962
_mm_lfence();
29612963
}
29622964

29632965
#[simd_test(enable = "sse2")]
2966+
// Miri cannot support this until it is clear how it fits in the Rust memory model
2967+
#[cfg_attr(miri, ignore)]
29642968
unsafe fn test_mm_mfence() {
29652969
_mm_mfence();
29662970
}
@@ -3828,6 +3832,9 @@ mod tests {
38283832
}
38293833

38303834
#[simd_test(enable = "sse2")]
3835+
// Miri cannot support this until it is clear how it fits in the Rust memory model
3836+
// (non-temporal store)
3837+
#[cfg_attr(miri, ignore)]
38313838
unsafe fn test_mm_maskmoveu_si128() {
38323839
let a = _mm_set1_epi8(9);
38333840
#[rustfmt::skip]
@@ -3866,6 +3873,9 @@ mod tests {
38663873
}
38673874

38683875
#[simd_test(enable = "sse2")]
3876+
// Miri cannot support this until it is clear how it fits in the Rust memory model
3877+
// (non-temporal store)
3878+
#[cfg_attr(miri, ignore)]
38693879
unsafe fn test_mm_stream_si128() {
38703880
let a = _mm_setr_epi32(1, 2, 3, 4);
38713881
let mut r = _mm_undefined_si128();
@@ -3874,6 +3884,9 @@ mod tests {
38743884
}
38753885

38763886
#[simd_test(enable = "sse2")]
3887+
// Miri cannot support this until it is clear how it fits in the Rust memory model
3888+
// (non-temporal store)
3889+
#[cfg_attr(miri, ignore)]
38773890
unsafe fn test_mm_stream_si32() {
38783891
let a: i32 = 7;
38793892
let mut mem = boxed::Box::<i32>::new(-1);
@@ -4562,6 +4575,9 @@ mod tests {
45624575
}
45634576

45644577
#[simd_test(enable = "sse2")]
4578+
// Miri cannot support this until it is clear how it fits in the Rust memory model
4579+
// (non-temporal store)
4580+
#[cfg_attr(miri, ignore)]
45654581
unsafe fn test_mm_stream_pd() {
45664582
#[repr(align(128))]
45674583
struct Memory {

crates/core_arch/src/x86_64/sse2.rs

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -181,6 +181,9 @@ mod tests {
181181
}
182182

183183
#[simd_test(enable = "sse2")]
184+
// Miri cannot support this until it is clear how it fits in the Rust memory model
185+
// (non-temporal store)
186+
#[cfg_attr(miri, ignore)]
184187
unsafe fn test_mm_stream_si64() {
185188
let a: i64 = 7;
186189
let mut mem = boxed::Box::<i64>::new(-1);

0 commit comments

Comments
 (0)