correct llvm link and assert_instr

SparrowLii · SparrowLii · commit c50c9fc72518 · 2021-04-19T16:49:33.000+08:00
diff --git a/crates/core_arch/src/aarch64/neon/generated.rs b/crates/core_arch/src/aarch64/neon/generated.rs
@@ -4610,25 +4610,15 @@ pub unsafe fn vreinterpretq_f32_f64(a: float64x2_t) -> float32x4_t {
 #[target_feature(enable = "neon")]
 #[cfg_attr(test, assert_instr(srshl))]
 pub unsafe fn vrshld_s64(a: i64, b: i64) -> i64 {
-    #[allow(improper_ctypes)]
-    extern "C" {
-        #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srshl.i64")]
-        fn vrshld_s64_(a: i64, b: i64) -> i64;
-    }
-    vrshld_s64_(a, b)
+    transmute(vrshl_s64(transmute(a), transmute(b)))
 }
 
 /// Unsigned rounding shift left
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(test, assert_instr(urshl))]
 pub unsafe fn vrshld_u64(a: u64, b: i64) -> u64 {
-    #[allow(improper_ctypes)]
-    extern "C" {
-        #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urshl.i64")]
-        fn vrshld_u64_(a: u64, b: i64) -> u64;
-    }
-    vrshld_u64_(a, b)
+    transmute(vrshl_u64(transmute(a), transmute(b)))
 }
 
 /// Signed rounding shift right
@@ -4714,7 +4704,7 @@ pub unsafe fn vrshrn_high_n_u64<const N: i32>(a: uint32x2_t, b: uint64x2_t) -> u
 /// Signed rounding shift right and accumulate
 #[inline]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(srsra, N = 2))]
+#[cfg_attr(test, assert_instr(nop, N = 2))]
 #[rustc_legacy_const_generics(2)]
 pub unsafe fn vrsrad_n_s64<const N: i32>(a: i64, b: i64) -> i64 {
     static_assert!(N : i32 where N >= 1 && N <= 64);
@@ -4725,7 +4715,7 @@ pub unsafe fn vrsrad_n_s64<const N: i32>(a: i64, b: i64) -> i64 {
 /// Ungisned rounding shift right and accumulate
 #[inline]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(ursra, N = 2))]
+#[cfg_attr(test, assert_instr(nop, N = 2))]
 #[rustc_legacy_const_generics(2)]
 pub unsafe fn vrsrad_n_u64<const N: i32>(a: u64, b: u64) -> u64 {
     static_assert!(N : i32 where N >= 1 && N <= 64);
@@ -4738,25 +4728,15 @@ pub unsafe fn vrsrad_n_u64<const N: i32>(a: u64, b: u64) -> u64 {
 #[target_feature(enable = "neon")]
 #[cfg_attr(test, assert_instr(sshl))]
 pub unsafe fn vshld_s64(a: i64, b: i64) -> i64 {
-    #[allow(improper_ctypes)]
-    extern "C" {
-        #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sshl.i64")]
-        fn vshld_s64_(a: i64, b: i64) -> i64;
-    }
-    vshld_s64_(a, b)
+    transmute(vshl_s64(transmute(a), transmute(b)))
 }
 
 /// Unsigned Shift left
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(test, assert_instr(ushl))]
 pub unsafe fn vshld_u64(a: u64, b: i64) -> u64 {
-    #[allow(improper_ctypes)]
-    extern "C" {
-        #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.ushl.i64")]
-        fn vshld_u64_(a: u64, b: i64) -> u64;
-    }
-    vshld_u64_(a, b)
+    transmute(vshl_u64(transmute(a), transmute(b)))
 }
 
 /// Signed shift left long
diff --git a/crates/core_arch/src/aarch64/neon/mod.rs b/crates/core_arch/src/aarch64/neon/mod.rs
@@ -2450,7 +2450,7 @@ pub unsafe fn vqtbx4q_p8(a: poly8x16_t, t: poly8x16x4_t, idx: uint8x16_t) -> pol
 /// Shift left
 #[inline]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(shl, N = 2))]
+#[cfg_attr(test, assert_instr(nop, N = 2))]
 #[rustc_legacy_const_generics(1)]
 pub unsafe fn vshld_n_s64<const N: i32>(a: i64) -> i64 {
     static_assert_imm6!(N);
@@ -2460,7 +2460,7 @@ pub unsafe fn vshld_n_s64<const N: i32>(a: i64) -> i64 {
 /// Shift left
 #[inline]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(shl, N = 2))]
+#[cfg_attr(test, assert_instr(nop, N = 2))]
 #[rustc_legacy_const_generics(1)]
 pub unsafe fn vshld_n_u64<const N: i32>(a: u64) -> u64 {
     static_assert_imm6!(N);
@@ -2470,7 +2470,7 @@ pub unsafe fn vshld_n_u64<const N: i32>(a: u64) -> u64 {
 /// Signed shift right
 #[inline]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(sshr, N = 2))]
+#[cfg_attr(test, assert_instr(nop, N = 2))]
 #[rustc_legacy_const_generics(1)]
 pub unsafe fn vshrd_n_s64<const N: i32>(a: i64) -> i64 {
     static_assert!(N : i32 where N >= 1 && N <= 64);
@@ -2480,7 +2480,7 @@ pub unsafe fn vshrd_n_s64<const N: i32>(a: i64) -> i64 {
 /// Unsigned shift right
 #[inline]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(ushr, N = 2))]
+#[cfg_attr(test, assert_instr(nop, N = 2))]
 #[rustc_legacy_const_generics(1)]
 pub unsafe fn vshrd_n_u64<const N: i32>(a: u64) -> u64 {
     static_assert!(N : i32 where N >= 1 && N <= 64);
@@ -2490,7 +2490,7 @@ pub unsafe fn vshrd_n_u64<const N: i32>(a: u64) -> u64 {
 /// Signed shift right and accumulate
 #[inline]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(ssra, N = 2))]
+#[cfg_attr(test, assert_instr(nop, N = 2))]
 #[rustc_legacy_const_generics(2)]
 pub unsafe fn vsrad_n_s64<const N: i32>(a: i64, b: i64) -> i64 {
     static_assert!(N : i32 where N >= 1 && N <= 64);
@@ -2500,7 +2500,7 @@ pub unsafe fn vsrad_n_s64<const N: i32>(a: i64, b: i64) -> i64 {
 /// Unsigned shift right and accumulate
 #[inline]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(usra, N = 2))]
+#[cfg_attr(test, assert_instr(nop, N = 2))]
 #[rustc_legacy_const_generics(2)]
 pub unsafe fn vsrad_n_u64<const N: i32>(a: u64, b: u64) -> u64 {
     static_assert!(N : i32 where N >= 1 && N <= 64);
diff --git a/crates/stdarch-gen/neon.spec b/crates/stdarch-gen/neon.spec
@@ -2717,12 +2717,21 @@ validate 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52, 56, 60, 64
 
 aarch64 = srshl
 link-aarch64 = srshl._EXT_
-generate i64
 
 arm = vrshl
 link-arm = vrshifts._EXT_
 generate int*_t, int64x*_t
 
+/// Signed rounding shift left
+name = vrshl
+multi_fn = transmute, {vrshl-in_ntt-noext, transmute(a), transmute(b)}
+a = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16
+b = 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
+validate 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52, 56, 60, 64
+
+aarch64 = srshl
+generate i64
+
 /// Unsigned rounding shift left
 name = vrshl
 out-suffix
@@ -2732,13 +2741,23 @@ validate 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52, 56, 60, 64
 
 aarch64 = urshl
 link-aarch64 = urshl._EXT_
-generate u64:i64:u64
 
 arm = vrshl
 link-arm = vrshiftu._EXT_
 generate uint8x8_t:int8x8_t:uint8x8_t, uint8x16_t:int8x16_t:uint8x16_t, uint16x4_t:int16x4_t:uint16x4_t, uint16x8_t:int16x8_t:uint16x8_t
 generate uint32x2_t:int32x2_t:uint32x2_t, uint32x4_t:int32x4_t:uint32x4_t, uint64x1_t:int64x1_t:uint64x1_t, uint64x2_t:int64x2_t:uint64x2_t
 
+/// Unsigned rounding shift left
+name = vrshl
+out-suffix
+multi_fn = transmute, {vrshl-out_ntt-noext, transmute(a), transmute(b)}
+a = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16
+b = 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
+validate 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52, 56, 60, 64
+
+aarch64 = urshl
+generate u64:i64:u64
+
 /// Signed rounding shift right
 name = vrshr
 n-suffix
@@ -2882,7 +2901,7 @@ b = 4
 n = 2
 validate 2
 
-aarch64 = srsra
+aarch64 = nop
 generate i64
 
 /// Ungisned rounding shift right and accumulate
@@ -2897,7 +2916,7 @@ b = 4
 n = 2
 validate 2
 
-aarch64 = ursra
+aarch64 = nop
 generate u64
 
 /// Signed Shift left
@@ -2906,30 +2925,47 @@ a = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16
 b = 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
 validate 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52, 56, 60, 64
 
-aarch64 = sshl
-link-aarch64 = sshl._EXT_
-generate i64
-
 arm = vshl
 link-arm = vshifts._EXT_
+aarch64 = sshl
+link-aarch64 = sshl._EXT_
 generate int*_t, int64x*_t
 
+/// Signed Shift left
+name = vshl
+multi_fn = transmute, {vshl-in_ntt-noext, transmute(a), transmute(b)}
+a = 1
+b = 2
+validate 4
+
+aarch64 = sshl
+generate i64
+
 /// Unsigned Shift left
 name = vshl
 out-suffix
 a = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16
 b = 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
 validate 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52, 56, 60, 64
 
-aarch64 = ushl
-link-aarch64 = ushl._EXT_
-generate u64:i64:u64
-
 arm = vshl
 link-arm = vshiftu._EXT_
+aarch64 = ushl
+link-aarch64 = ushl._EXT_
 generate uint8x8_t:int8x8_t:uint8x8_t, uint8x16_t:int8x16_t:uint8x16_t, uint16x4_t:int16x4_t:uint16x4_t, uint16x8_t:int16x8_t:uint16x8_t
 generate uint32x2_t:int32x2_t:uint32x2_t, uint32x4_t:int32x4_t:uint32x4_t, uint64x1_t:int64x1_t:uint64x1_t, uint64x2_t:int64x2_t:uint64x2_t
 
+/// Unsigned Shift left
+out-suffix
+name = vshl
+multi_fn = transmute, {vshl-out_ntt-noext, transmute(a), transmute(b)}
+a = 1
+b = 2
+validate 4
+
+aarch64 = ushl
+generate u64:i64:u64
+
 /// Shift left
 name = vshl
 n-suffix
diff --git a/crates/stdarch-gen/src/main.rs b/crates/stdarch-gen/src/main.rs
@@ -482,14 +482,14 @@ fn type_to_ext(t: &str) -> &str {
         "poly8x16_t" => "v16i8",
         "poly16x4_t" => "v4i16",
         "poly16x8_t" => "v8i16",
-        "i8" => "i8",
-        "i16" => "i16",
-        "i32" => "i32",
-        "i64" => "i64",
-        "u8" => "i8",
-        "u16" => "i16",
-        "u32" => "i32",
-        "u64" => "i64",
+        "i8" => "v8i8",
+        "i16" => "v4i16",
+        "i32" => "v2i32",
+        "i64" => "v1i64",
+        "u8" => "v8i8",
+        "u16" => "v4i16",
+        "u32" => "v2i32",
+        "u64" => "v1i64",
         /*
         "poly64x1_t" => "i64x1",
         "poly64x2_t" => "i64x2",
