core_arch: Fix ARMv6 CP15 barrier

taiki-e · Amanieu · commit ca1b140b0b50 · 2023-09-29T09:10:33.000+01:00
diff --git a/crates/core_arch/src/arm_shared/barrier/cp15.rs b/crates/core_arch/src/arm_shared/barrier/cp15.rs
@@ -11,7 +11,8 @@ impl super::super::sealed::Dmb for SY {
     #[inline(always)]
     unsafe fn __dmb(&self) {
         asm!(
-            "mcr p15, 0, r0, c7, c10, 5",
+            "mcr p15, 0, {}, c7, c10, 5",
+            in(reg) 0_u32,
             options(preserves_flags, nostack)
         )
     }
@@ -21,7 +22,8 @@ impl super::super::sealed::Dsb for SY {
     #[inline(always)]
     unsafe fn __dsb(&self) {
         asm!(
-            "mcr p15, 0, r0, c7, c10, 4",
+            "mcr p15, 0, {}, c7, c10, 4",
+            in(reg) 0_u32,
             options(preserves_flags, nostack)
         )
     }
@@ -31,7 +33,8 @@ impl super::super::sealed::Isb for SY {
     #[inline(always)]
     unsafe fn __isb(&self) {
         asm!(
-            "mcr p15, 0, r0, c7, c5, 4",
+            "mcr p15, 0, {}, c7, c5, 4",
+            in(reg) 0_u32,
             options(preserves_flags, nostack)
         )
     }

Original file line number	Diff line number	Diff line change
`@@ -11,7 +11,8 @@ impl super::super::sealed::Dmb for SY {`
`11`	`11`	`#[inline(always)]`
`12`	`12`	`unsafe fn __dmb(&self) {`
`13`	`13`	`asm!(`
`14`		`- "mcr p15, 0, r0, c7, c10, 5",`
	`14`	`+ "mcr p15, 0, {}, c7, c10, 5",`
	`15`	`+ in(reg) 0_u32,`
`15`	`16`	`options(preserves_flags, nostack)`
`16`	`17`	`)`
`17`	`18`	`}`
`@@ -21,7 +22,8 @@ impl super::super::sealed::Dsb for SY {`
`21`	`22`	`#[inline(always)]`
`22`	`23`	`unsafe fn __dsb(&self) {`
`23`	`24`	`asm!(`
`24`		`- "mcr p15, 0, r0, c7, c10, 4",`
	`25`	`+ "mcr p15, 0, {}, c7, c10, 4",`
	`26`	`+ in(reg) 0_u32,`
`25`	`27`	`options(preserves_flags, nostack)`
`26`	`28`	`)`
`27`	`29`	`}`
`@@ -31,7 +33,8 @@ impl super::super::sealed::Isb for SY {`
`31`	`33`	`#[inline(always)]`
`32`	`34`	`unsafe fn __isb(&self) {`
`33`	`35`	`asm!(`
`34`		`- "mcr p15, 0, r0, c7, c5, 4",`
	`36`	`+ "mcr p15, 0, {}, c7, c5, 4",`
	`37`	`+ in(reg) 0_u32,`
`35`	`38`	`options(preserves_flags, nostack)`
`36`	`39`	`)`
`37`	`40`	`}`