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sunnygleasonLicenser
sunnygleason
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feat: improved test coverage for ARM intrinsics
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-1732
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2 files changed

+2373
-1732
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‎crates/core_arch/src/arm/neon/generated.rs

Lines changed: 200 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -542,6 +542,26 @@ pub unsafe fn vceqq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
542542
simd_eq(a, b)
543543
}
544544

545+
/// Compare bitwise Equal (vector)
546+
#[inline]
547+
#[target_feature(enable = "neon")]
548+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
549+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmeq))]
550+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
551+
pub unsafe fn vceq_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
552+
simd_eq(a, b)
553+
}
554+
555+
/// Compare bitwise Equal (vector)
556+
#[inline]
557+
#[target_feature(enable = "neon")]
558+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
559+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmeq))]
560+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
561+
pub unsafe fn vceqq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
562+
simd_eq(a, b)
563+
}
564+
545565
/// Compare bitwise Equal (vector)
546566
#[inline]
547567
#[target_feature(enable = "neon")]
@@ -602,6 +622,26 @@ pub unsafe fn vceqq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
602622
simd_eq(a, b)
603623
}
604624

625+
/// Compare bitwise Equal (vector)
626+
#[inline]
627+
#[target_feature(enable = "neon")]
628+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
629+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmeq))]
630+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
631+
pub unsafe fn vceq_s64(a: int64x1_t, b: int64x1_t) -> uint64x1_t {
632+
simd_eq(a, b)
633+
}
634+
635+
/// Compare bitwise Equal (vector)
636+
#[inline]
637+
#[target_feature(enable = "neon")]
638+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
639+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmeq))]
640+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
641+
pub unsafe fn vceqq_s64(a: int64x2_t, b: int64x2_t) -> uint64x2_t {
642+
simd_eq(a, b)
643+
}
644+
605645
/// Floating-point compare equal
606646
#[inline]
607647
#[target_feature(enable = "neon")]
@@ -682,6 +722,26 @@ pub unsafe fn vcgtq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
682722
simd_gt(a, b)
683723
}
684724

725+
/// Compare signed greater than
726+
#[inline]
727+
#[target_feature(enable = "neon")]
728+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
729+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmgt))]
730+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
731+
pub unsafe fn vcgt_s64(a: int64x1_t, b: int64x1_t) -> uint64x1_t {
732+
simd_gt(a, b)
733+
}
734+
735+
/// Compare signed greater than
736+
#[inline]
737+
#[target_feature(enable = "neon")]
738+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
739+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmgt))]
740+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
741+
pub unsafe fn vcgtq_s64(a: int64x2_t, b: int64x2_t) -> uint64x2_t {
742+
simd_gt(a, b)
743+
}
744+
685745
/// Compare unsigned highe
686746
#[inline]
687747
#[target_feature(enable = "neon")]
@@ -742,6 +802,26 @@ pub unsafe fn vcgtq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
742802
simd_gt(a, b)
743803
}
744804

805+
/// Compare unsigned highe
806+
#[inline]
807+
#[target_feature(enable = "neon")]
808+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
809+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmhi))]
810+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
811+
pub unsafe fn vcgt_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
812+
simd_gt(a, b)
813+
}
814+
815+
/// Compare unsigned highe
816+
#[inline]
817+
#[target_feature(enable = "neon")]
818+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
819+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmhi))]
820+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
821+
pub unsafe fn vcgtq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
822+
simd_gt(a, b)
823+
}
824+
745825
/// Floating-point compare greater than
746826
#[inline]
747827
#[target_feature(enable = "neon")]
@@ -822,6 +902,26 @@ pub unsafe fn vcltq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
822902
simd_lt(a, b)
823903
}
824904

905+
/// Compare signed less than
906+
#[inline]
907+
#[target_feature(enable = "neon")]
908+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
909+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmgt))]
910+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
911+
pub unsafe fn vclt_s64(a: int64x1_t, b: int64x1_t) -> uint64x1_t {
912+
simd_lt(a, b)
913+
}
914+
915+
/// Compare signed less than
916+
#[inline]
917+
#[target_feature(enable = "neon")]
918+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
919+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmgt))]
920+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
921+
pub unsafe fn vcltq_s64(a: int64x2_t, b: int64x2_t) -> uint64x2_t {
922+
simd_lt(a, b)
923+
}
924+
825925
/// Compare unsigned less than
826926
#[inline]
827927
#[target_feature(enable = "neon")]
@@ -862,6 +962,26 @@ pub unsafe fn vcltq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
862962
simd_lt(a, b)
863963
}
864964

965+
/// Compare unsigned less than
966+
#[inline]
967+
#[target_feature(enable = "neon")]
968+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
969+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmhi))]
970+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
971+
pub unsafe fn vclt_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
972+
simd_lt(a, b)
973+
}
974+
975+
/// Compare unsigned less than
976+
#[inline]
977+
#[target_feature(enable = "neon")]
978+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
979+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmhi))]
980+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
981+
pub unsafe fn vcltq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
982+
simd_lt(a, b)
983+
}
984+
865985
/// Compare unsigned less than
866986
#[inline]
867987
#[target_feature(enable = "neon")]
@@ -962,6 +1082,26 @@ pub unsafe fn vcleq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
9621082
simd_le(a, b)
9631083
}
9641084

1085+
/// Compare signed less than or equal
1086+
#[inline]
1087+
#[target_feature(enable = "neon")]
1088+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1089+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmge))]
1090+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
1091+
pub unsafe fn vcle_s64(a: int64x1_t, b: int64x1_t) -> uint64x1_t {
1092+
simd_le(a, b)
1093+
}
1094+
1095+
/// Compare signed less than or equal
1096+
#[inline]
1097+
#[target_feature(enable = "neon")]
1098+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1099+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmge))]
1100+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
1101+
pub unsafe fn vcleq_s64(a: int64x2_t, b: int64x2_t) -> uint64x2_t {
1102+
simd_le(a, b)
1103+
}
1104+
9651105
/// Compare unsigned less than or equal
9661106
#[inline]
9671107
#[target_feature(enable = "neon")]
@@ -1022,6 +1162,26 @@ pub unsafe fn vcleq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
10221162
simd_le(a, b)
10231163
}
10241164

1165+
/// Compare unsigned less than or equal
1166+
#[inline]
1167+
#[target_feature(enable = "neon")]
1168+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1169+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmhs))]
1170+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1171+
pub unsafe fn vcle_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
1172+
simd_le(a, b)
1173+
}
1174+
1175+
/// Compare unsigned less than or equal
1176+
#[inline]
1177+
#[target_feature(enable = "neon")]
1178+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1179+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmhs))]
1180+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1181+
pub unsafe fn vcleq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
1182+
simd_le(a, b)
1183+
}
1184+
10251185
/// Floating-point compare less than or equal
10261186
#[inline]
10271187
#[target_feature(enable = "neon")]
@@ -1102,6 +1262,26 @@ pub unsafe fn vcgeq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
11021262
simd_ge(a, b)
11031263
}
11041264

1265+
/// Compare signed greater than or equal
1266+
#[inline]
1267+
#[target_feature(enable = "neon")]
1268+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1269+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmge))]
1270+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
1271+
pub unsafe fn vcge_s64(a: int64x1_t, b: int64x1_t) -> uint64x1_t {
1272+
simd_ge(a, b)
1273+
}
1274+
1275+
/// Compare signed greater than or equal
1276+
#[inline]
1277+
#[target_feature(enable = "neon")]
1278+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1279+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmge))]
1280+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
1281+
pub unsafe fn vcgeq_s64(a: int64x2_t, b: int64x2_t) -> uint64x2_t {
1282+
simd_ge(a, b)
1283+
}
1284+
11051285
/// Compare unsigned greater than or equal
11061286
#[inline]
11071287
#[target_feature(enable = "neon")]
@@ -1162,6 +1342,26 @@ pub unsafe fn vcgeq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
11621342
simd_ge(a, b)
11631343
}
11641344

1345+
/// Compare unsigned greater than or equal
1346+
#[inline]
1347+
#[target_feature(enable = "neon")]
1348+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1349+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmhs))]
1350+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1351+
pub unsafe fn vcge_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
1352+
simd_ge(a, b)
1353+
}
1354+
1355+
/// Compare unsigned greater than or equal
1356+
#[inline]
1357+
#[target_feature(enable = "neon")]
1358+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1359+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(cmhs))]
1360+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1361+
pub unsafe fn vcgeq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
1362+
simd_ge(a, b)
1363+
}
1364+
11651365
/// Floating-point compare greater than or equal
11661366
#[inline]
11671367
#[target_feature(enable = "neon")]

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