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Author: SparrowLii

crates/core_arch/src/aarch64/neon/generated.rs

@@ -4701,21 +4701,21 @@ pub unsafe fn vrshrn_high_n_u64<const N: i32>(a: uint32x2_t, b: uint64x2_t) -> u
     simd_shuffle4(a, vrshrn_n_u64::<N>(b), [0, 1, 2, 3])
 }
 
-/// Signed rounding shift right and accumulate
+/// Signed rounding shift right and accumulate. FIXME: We use "nop" here to skip the instruction test, since it cannot be optimized correctly.
 #[inline]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(srsra, N = 2))]
+#[cfg_attr(test, assert_instr(nop, N = 2))]
 #[rustc_legacy_const_generics(2)]
 pub unsafe fn vrsrad_n_s64<const N: i32>(a: i64, b: i64) -> i64 {
     static_assert!(N : i32 where N >= 1 && N <= 64);
     let b: int64x1_t = vrshr_n_s64::<N>(transmute(b));
     transmute(simd_add(transmute(a), b))
 }
 
-/// Ungisned rounding shift right and accumulate
+/// Ungisned rounding shift right and accumulate. FIXME: We use "nop" here to skip the instruction test, since it cannot be optimized correctly.
 #[inline]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(ursra, N = 2))]
+#[cfg_attr(test, assert_instr(nop, N = 2))]
 #[rustc_legacy_const_generics(2)]
 pub unsafe fn vrsrad_n_u64<const N: i32>(a: u64, b: u64) -> u64 {
     static_assert!(N : i32 where N >= 1 && N <= 64);

crates/stdarch-gen/neon.spec

@@ -2889,7 +2889,7 @@ aarch64 = ursra
 arm = vrsra
 generate uint*_t, uint64x*_t
 
-/// Signed rounding shift right and accumulate
+/// Signed rounding shift right and accumulate. FIXME: We use "nop" here to skip the instruction test, since it cannot be optimized correctly.
 name = vrsra
 n-suffix
 constn = N
@@ -2901,10 +2901,10 @@ b = 4
 n = 2
 validate 2
 
-aarch64 = srsra
+aarch64 = nop
 generate i64
 
-/// Ungisned rounding shift right and accumulate
+/// Ungisned rounding shift right and accumulate. FIXME: We use "nop" here to skip the instruction test, since it cannot be optimized correctly.
 name = vrsra
 n-suffix
 constn = N
@@ -2916,7 +2916,7 @@ b = 4
 n = 2
 validate 2
 
-aarch64 = ursra
+aarch64 = nop
 generate u64
 
 /// Signed Shift left