We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
llvm.ppc.altivec.lvx
vec_ld
1 parent b668972 commit f85ee20Copy full SHA for f85ee20
crates/core_arch/src/powerpc/altivec.rs
@@ -51,6 +51,10 @@ types! {
51
52
#[allow(improper_ctypes)]
53
extern "C" {
54
+ #[link_name = "llvm.ppc.altivec.lvx"]
55
+ fn lvx(
56
+ p: *const i8,
57
+ ) -> vector_unsigned_int;
58
#[link_name = "llvm.ppc.altivec.vperm"]
59
fn vperm(
60
a: vector_signed_int,
@@ -442,8 +446,7 @@ mod sealed {
442
446
#[inline(always)]
443
447
unsafe fn load(off: i32, p: *const i8) -> u32x4 {
444
448
let addr = p.offset(off as isize);
445
-
- *(addr as *const u32x4)
449
+ transmute(lvx(addr))
450
}
451
452
pub trait VectorLd {
0 commit comments