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Merge commit '4531aee2ac16' from llvm.org/master into apple/master
2 parents 98d242d + 4531aee commit 02752e7

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llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

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@@ -4435,6 +4435,9 @@ void AMDGPUTargetLowering::computeKnownBitsForTargetNode(
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unsigned TrailZ = LHSKnown.countMinTrailingZeros() +
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RHSKnown.countMinTrailingZeros();
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Known.Zero.setLowBits(std::min(TrailZ, 32u));
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// Skip extra check if all bits are known zeros.
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if (TrailZ >= 32)
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break;
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// Truncate to 24 bits.
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LHSKnown = LHSKnown.trunc(24);

llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll

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@@ -157,3 +157,14 @@ define i32 @num_sign_bits_mul_i32_10(i32 %x, i32 %y, i32 %z, i32 %w) {
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%mul2 = mul i32 %mul0, %mul1
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ret i32 %mul2
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}
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; GFX9-LABEL: known_bits_mul24:
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; GFX9: v_mov_b32_e32 v0, 0
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; GFX9-NEXT: s_setpc_b64
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define i32 @known_bits_mul24() {
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%r0 = call i32 @llvm.amdgcn.mul.i24(i32 0, i32 -7)
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%r1 = shl i32 %r0, 2
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ret i32 %r1
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}
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declare i32 @llvm.amdgcn.mul.i24(i32, i32)

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