[test] Replace -triple aarch64-arm-none-eabi with -triple aarch64

MaskRay · MaskRay · commit 02e9441d6ca7 · 2023-06-27T19:21:41.000-07:00
Using "eabi" for aarch64 targets is a common mistake and warned by driver
(D153430). We want to avoid them for -cc1 tests as well.
diff --git a/clang/test/CodeGen/aarch64-bf16-dotprod-intrinsics.c b/clang/test/CodeGen/aarch64-bf16-dotprod-intrinsics.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +neon -target-feature +bf16 \
+// RUN: %clang_cc1 -triple aarch64 -target-feature +neon -target-feature +bf16 \
 // RUN: -disable-O0-optnone -emit-llvm %s -o - | opt -S -passes=mem2reg | FileCheck %s
 
 // REQUIRES: aarch64-registered-target || arm-registered-target
diff --git a/clang/test/CodeGen/aarch64-bf16-getset-intrinsics.c b/clang/test/CodeGen/aarch64-bf16-getset-intrinsics.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +neon -target-feature +bf16 \
+// RUN: %clang_cc1 -triple aarch64 -target-feature +neon -target-feature +bf16 \
 // RUN:  -disable-O0-optnone -emit-llvm %s -o - | opt -S -passes=mem2reg | FileCheck %s
 
 // REQUIRES: aarch64-registered-target || arm-registered-target
diff --git a/clang/test/CodeGen/aarch64-bf16-lane-intrinsics.c b/clang/test/CodeGen/aarch64-bf16-lane-intrinsics.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +neon -target-feature +bf16 \
+// RUN: %clang_cc1 -triple aarch64 -target-feature +neon -target-feature +bf16 \
 // RUN:  -disable-O0-optnone -emit-llvm %s -o - | opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-LE %s
 // RUN: %clang_cc1 -triple aarch64_be-arm-none-eabi -target-feature +neon -target-feature +bf16 \
 // RUN:  -disable-O0-optnone -emit-llvm %s -o - | opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-BE %s
diff --git a/clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c b/clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +neon -target-feature +bf16 \
+// RUN: %clang_cc1 -triple aarch64 -target-feature +neon -target-feature +bf16 \
 // RUN:  -O2 -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK64
 // RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-feature +neon -target-feature +bf16 -mfloat-abi hard \
 // RUN:  -O2 -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK32
diff --git a/clang/test/CodeGen/aarch64-bf16-reinterpret-intrinsics.c b/clang/test/CodeGen/aarch64-bf16-reinterpret-intrinsics.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +neon -target-feature +bf16 \
+// RUN: %clang_cc1 -triple aarch64 -target-feature +neon -target-feature +bf16 \
 // RUN: -disable-O0-optnone -S -emit-llvm -o - %s \
 // RUN: | opt -S -passes=mem2reg \
 // RUN: | FileCheck %s
diff --git a/clang/test/CodeGen/arm-bf16-convert-intrinsics.c b/clang/test/CodeGen/arm-bf16-convert-intrinsics.c
@@ -1,6 +1,6 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // RUN: %clang_cc1 \
-// RUN:   -triple aarch64-arm-none-eabi -target-feature +neon -target-feature +bf16 \
+// RUN:   -triple aarch64 -target-feature +neon -target-feature +bf16 \
 // RUN:   -disable-O0-optnone -emit-llvm -o - %s \
 // RUN:   | opt -S -passes=mem2reg \
 // RUN:   | FileCheck --check-prefixes=CHECK,CHECK-A64 %s
diff --git a/clang/test/CodeGen/arm-bf16-params-returns.c b/clang/test/CodeGen/arm-bf16-params-returns.c
@@ -1,7 +1,7 @@
 // RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefix=CHECK32-HARD
 // RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefix=CHECK32-SOFTFP
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-abi aapcs -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=CHECK64,CHECK64NEON
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-abi aapcs -target-feature -bf16 -target-feature +neon -DNONEON -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefix=CHECK64
+// RUN: %clang_cc1 -triple aarch64 -target-abi aapcs -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=CHECK64,CHECK64NEON
+// RUN: %clang_cc1 -triple aarch64 -target-abi aapcs -target-feature -bf16 -target-feature +neon -DNONEON -emit-llvm -O2 -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefix=CHECK64
 
 // REQUIRES: aarch64-registered-target || arm-registered-target
 
diff --git a/clang/test/CodeGen/arm-mangle-bf16.cpp b/clang/test/CodeGen/arm-mangle-bf16.cpp
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +bf16 -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature -bf16 -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64 -target-feature -bf16 -emit-llvm -o - %s | FileCheck %s
 // RUN: %clang_cc1 -triple arm-arm-none-eabi -target-feature +bf16 -mfloat-abi hard -emit-llvm -o - %s | FileCheck %s
 // RUN: %clang_cc1 -triple arm-arm-none-eabi -target-feature +bf16 -mfloat-abi softfp -emit-llvm -o - %s | FileCheck %s
 
diff --git a/clang/test/CodeGenCXX/fp16-mangle-arg-return.cpp b/clang/test/CodeGenCXX/fp16-mangle-arg-return.cpp
@@ -1,5 +1,5 @@
 // RUN: %clang_cc1 -emit-llvm -o - -triple arm-arm-none-eabi %s | FileCheck %s
-// RUN: %clang_cc1 -emit-llvm -o - -triple aarch64-arm-none-eabi %s | FileCheck %s
+// RUN: %clang_cc1 -emit-llvm -o - -triple aarch64 %s | FileCheck %s
 
 // Test name-mangling of __fp16 passed directly as a function argument
 // (when that is permitted).
diff --git a/clang/test/Driver/arm-aarch64-bitfield-flags.c b/clang/test/Driver/arm-aarch64-bitfield-flags.c
@@ -1,18 +1,18 @@
 /// check -faapcs-bitfield-width/-fno-aapcs-bitfield-width
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main -faapcs-bitfield-width -### %s 2>&1 | FileCheck --check-prefixes=WIDTH,INVERSE-WIDTH %s
-// RUN: %clang -target aarch64-arm-none-eabi -march=armv8-m.main -faapcs-bitfield-width -### %s 2>&1 | FileCheck --check-prefixes=WIDTH,INVERSE-WIDTH %s
+// RUN: %clang --target=aarch64 -march=armv8-m.main -faapcs-bitfield-width -### %s 2>&1 | FileCheck --check-prefixes=WIDTH,INVERSE-WIDTH %s
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main -fno-aapcs-bitfield-width -### %s 2>&1 | FileCheck --check-prefixes=NO-WIDTH,WIDTH %s
-// RUN: %clang -target aarch64-arm-none-eabi -march=armv8-m.main -fno-aapcs-bitfield-width -### %s 2>&1 | FileCheck --check-prefixes=NO-WIDTH,WIDTH %s
+// RUN: %clang --target=aarch64 -march=armv8-m.main -fno-aapcs-bitfield-width -### %s 2>&1 | FileCheck --check-prefixes=NO-WIDTH,WIDTH %s
 // WIDTH-NOT: -faapcs-bitfield-width
 // NO-WIDTH: -fno-aapcs-bitfield-width
 
 /// check -faapcs-bitfield-load
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main -faapcs-bitfield-load -### %s 2>&1 | FileCheck --check-prefix=LOAD %s
-// RUN: %clang -target aarch64-arm-none-eabi -march=armv8-m.main -faapcs-bitfield-load -### %s 2>&1 | FileCheck --check-prefix=LOAD %s
+// RUN: %clang --target=aarch64 -march=armv8-m.main -faapcs-bitfield-load -### %s 2>&1 | FileCheck --check-prefix=LOAD %s
 // LOAD: -faapcs-bitfield-load
 
 /// check absence of the above argument when not given
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main -### %s 2>&1 | FileCheck --check-prefixes=INVERSE-WIDTH,INVERSE-LOAD %s
-// RUN: %clang -target aarch64-arm-none-eabi -march=armv8-m.main -### %s 2>&1 | FileCheck --check-prefixes=INVERSE-WIDTH,INVERSE-LOAD %s
+// RUN: %clang --target=aarch64 -march=armv8-m.main -### %s 2>&1 | FileCheck --check-prefixes=INVERSE-WIDTH,INVERSE-LOAD %s
 // INVERSE-WIDTH-NOT: -fno-aapcs-bitfield-width
 // INVERSE-LOAD-NOT: -fno-aapcs-bitfield-load
diff --git a/clang/test/Sema/aarch64-bf16-ldst-intrinsics.c b/clang/test/Sema/aarch64-bf16-ldst-intrinsics.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +neon -target-feature +bf16 \
+// RUN: %clang_cc1 -triple aarch64 -target-feature +neon -target-feature +bf16 \
 // RUN:  -O2 -verify -fsyntax-only %s
 
 // REQUIRES: aarch64-registered-target || arm-registered-target
diff --git a/clang/test/Sema/aarch64-neon-bf16-ranges.c b/clang/test/Sema/aarch64-neon-bf16-ranges.c
@@ -1,5 +1,5 @@
 // RUN: %clang_cc1 -fsyntax-only -verify \
-// RUN: -triple aarch64-arm-none-eabi -target-feature +neon \
+// RUN: -triple aarch64 -target-feature +neon \
 // RUN: -target-feature +bf16 %s
 
 // REQUIRES: aarch64-registered-target || arm-registered-target
diff --git a/clang/test/Sema/arm-bfloat.cpp b/clang/test/Sema/arm-bfloat.cpp
@@ -1,13 +1,13 @@
 // RUN: %clang_cc1 -fsyntax-only -verify=scalar,neon -std=c++11 \
-// RUN:   -triple aarch64-arm-none-eabi -target-cpu cortex-a75 \
+// RUN:   -triple aarch64 -target-cpu cortex-a75 \
 // RUN:   -target-feature +bf16 -target-feature +neon -Wno-unused %s
 // RUN: %clang_cc1 -fsyntax-only -verify=scalar,neon -std=c++11 \
 // RUN:   -triple arm-arm-none-eabi -target-cpu cortex-a53 \
 // RUN:   -target-feature +bf16 -target-feature +neon -Wno-unused %s
 
 // The types should be available under AArch64 even without the bf16 feature
 // RUN: %clang_cc1 -fsyntax-only -verify=scalar -DNONEON -std=c++11 \
-// RUN:   -triple aarch64-arm-none-eabi -target-cpu cortex-a75 \
+// RUN:   -triple aarch64 -target-cpu cortex-a75 \
 // RUN:   -target-feature -bf16 -target-feature +neon -Wno-unused %s
 
 // REQUIRES: aarch64-registered-target || arm-registered-target
diff --git a/clang/test/Sema/arm-sve-target.cpp b/clang/test/Sema/arm-sve-target.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -fsyntax-only -verify -DNONEON -std=c++11 -triple aarch64-arm-none-eabi %s
+// RUN: %clang_cc1 -fsyntax-only -verify -DNONEON -std=c++11 -triple aarch64 %s
 
 // A target without sve should not be able to use sve types.
 
diff --git a/clang/test/Sema/sugar-common-types.c b/clang/test/Sema/sugar-common-types.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -fsyntax-only -verify %s -std=c99 -triple aarch64-arm-none-eabi -target-feature +bf16 -target-feature +sve
+// RUN: %clang_cc1 -fsyntax-only -verify %s -std=c99 -triple aarch64 -target-feature +bf16 -target-feature +sve
 
 typedef struct N {} N;
 
diff --git a/clang/test/SemaOpenMP/arm-sve-acle-types.cpp b/clang/test/SemaOpenMP/arm-sve-acle-types.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -fopenmp -fsyntax-only -triple aarch64-arm-none-eabi -target-feature +sve -verify %s
+// RUN: %clang_cc1 -fopenmp -fsyntax-only -triple aarch64 -target-feature +sve -verify %s
 // expected-no-diagnostics
 
 __SVBool_t foo(int);

Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +neon -target-feature +bf16 \`
	`1`	`+// RUN: %clang_cc1 -triple aarch64 -target-feature +neon -target-feature +bf16 \`
`2`	`2`	`// RUN: -disable-O0-optnone -S -emit-llvm -o - %s \`
`3`	`3`	`// RUN: \| opt -S -passes=mem2reg \`
`4`	`4`	`// RUN: \| FileCheck %s`
Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-// RUN: %clang_cc1 -fsyntax-only -verify -DNONEON -std=c++11 -triple aarch64-arm-none-eabi %s`
	`1`	`+// RUN: %clang_cc1 -fsyntax-only -verify -DNONEON -std=c++11 -triple aarch64 %s`
`2`	`2`
`3`	`3`	`// A target without sve should not be able to use sve types.`
`4`	`4`
Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-// RUN: %clang_cc1 -fopenmp -fsyntax-only -triple aarch64-arm-none-eabi -target-feature +sve -verify %s`
	`1`	`+// RUN: %clang_cc1 -fopenmp -fsyntax-only -triple aarch64 -target-feature +sve -verify %s`
`2`	`2`	`// expected-no-diagnostics`
`3`	`3`
`4`	`4`	`__SVBool_t foo(int);`