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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86 |
| 3 | +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64 |
| 4 | + |
| 5 | +define fastcc i32* @force.ri32(i32* %x) nounwind { |
| 6 | +; X86-LABEL: force.ri32: |
| 7 | +; X86: # %bb.0: # %entry |
| 8 | +; X86-NEXT: testl %ecx, %ecx |
| 9 | +; X86-NEXT: je .LBB0_2 |
| 10 | +; X86-NEXT: # %bb.1: # %Limpl0.pre |
| 11 | +; X86-NEXT: movl %ecx, %eax |
| 12 | +; X86-NEXT: retl |
| 13 | +; X86-NEXT: .LBB0_2: # %Limpl1.pre |
| 14 | +; X86-NEXT: calll pr.error@PLT |
| 15 | +; |
| 16 | +; X64-LABEL: force.ri32: |
| 17 | +; X64: # %bb.0: # %entry |
| 18 | +; X64-NEXT: testq %rdi, %rdi |
| 19 | +; X64-NEXT: je .LBB0_2 |
| 20 | +; X64-NEXT: # %bb.1: # %Limpl0.pre |
| 21 | +; X64-NEXT: movq %rdi, %rax |
| 22 | +; X64-NEXT: retq |
| 23 | +; X64-NEXT: .LBB0_2: # %Limpl1.pre |
| 24 | +; X64-NEXT: pushq %rax |
| 25 | +; X64-NEXT: callq pr.error@PLT |
| 26 | +entry: |
| 27 | + %nz = icmp eq i32* %x, null |
| 28 | + br i1 %nz, label %Limpl1.pre, label %Limpl0.pre |
| 29 | + |
| 30 | +Limpl0.pre: ; preds = %entry |
| 31 | + ret i32* %x |
| 32 | + |
| 33 | +Limpl1.pre: ; preds = %entry |
| 34 | + tail call fastcc void @pr.error() noreturn nounwind |
| 35 | + unreachable |
| 36 | +} |
| 37 | + |
| 38 | +declare fastcc void @pr.error() noreturn nounwind |
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