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AMDGPU: Sanitized functions require implicit arguments
Do not infer no-amdgpu-implicitarg-ptr for sanitized functions. If a function is explicitly marked amdgpu-no-implicitarg-ptr and sanitize_address, infer that it is required.
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-2
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2 files changed

+113
-2
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -112,6 +112,17 @@ static bool isDSAddress(const Constant *C) {
112112
return AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::REGION_ADDRESS;
113113
}
114114

115+
/// Returns true if the function requires the implicit argument be passed
116+
/// regardless of the function contents.
117+
static bool funcRequiresImplicitArgPtr(const Function &F) {
118+
// Sanitizers require the hostcall buffer passed in the implicit arguments.
119+
return F.hasFnAttribute(Attribute::SanitizeAddress) ||
120+
F.hasFnAttribute(Attribute::SanitizeThread) ||
121+
F.hasFnAttribute(Attribute::SanitizeMemory) ||
122+
F.hasFnAttribute(Attribute::SanitizeHWAddress) ||
123+
F.hasFnAttribute(Attribute::SanitizeMemTag);
124+
}
125+
115126
namespace {
116127
class AMDGPUInformationCache : public InformationCache {
117128
public:
@@ -339,7 +350,17 @@ struct AAAMDAttributesFunction : public AAAMDAttributes {
339350

340351
void initialize(Attributor &A) override {
341352
Function *F = getAssociatedFunction();
353+
354+
// If the function requires the implicit arg pointer due to sanitizers,
355+
// assume it's needed even if explicitly marked as not requiring it.
356+
const bool NeedsImplicit = funcRequiresImplicitArgPtr(*F);
357+
if (NeedsImplicit)
358+
removeAssumedBits(IMPLICIT_ARG_PTR);
359+
342360
for (auto Attr : ImplicitAttrs) {
361+
if (NeedsImplicit && Attr.first == IMPLICIT_ARG_PTR)
362+
continue;
363+
343364
if (F->hasFnAttribute(Attr.second))
344365
addKnownBits(Attr.first);
345366
}

‎llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll

Lines changed: 92 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -688,7 +688,7 @@ define void @func_call_asm() #3 {
688688
;
689689
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_call_asm
690690
; ATTRIBUTOR_HSA-SAME: () #[[ATTR16]] {
691-
; ATTRIBUTOR_HSA-NEXT: call void asm sideeffect "", ""() #[[ATTR17:[0-9]+]]
691+
; ATTRIBUTOR_HSA-NEXT: call void asm sideeffect "", ""() #[[ATTR20:[0-9]+]]
692692
; ATTRIBUTOR_HSA-NEXT: ret void
693693
;
694694
call void asm sideeffect "", ""() #3
@@ -837,17 +837,104 @@ define float @func_other_intrinsic_call(float %arg) #3 {
837837
ret float %fadd
838838
}
839839

840+
; Implicit arguments need to be enabled for sanitizers
841+
define amdgpu_kernel void @kern_sanitize_address() #4 {
842+
; AKF_HSA-LABEL: define {{[^@]+}}@kern_sanitize_address
843+
; AKF_HSA-SAME: () #[[ATTR5:[0-9]+]] {
844+
; AKF_HSA-NEXT: store volatile i32 0, i32 addrspace(1)* null, align 4
845+
; AKF_HSA-NEXT: ret void
846+
;
847+
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_sanitize_address
848+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR17:[0-9]+]] {
849+
; ATTRIBUTOR_HSA-NEXT: store volatile i32 0, i32 addrspace(1)* null, align 4
850+
; ATTRIBUTOR_HSA-NEXT: ret void
851+
;
852+
store volatile i32 0, i32 addrspace(1)* null
853+
ret void
854+
}
855+
856+
; Implicit arguments need to be enabled for sanitizers
857+
define void @func_sanitize_address() #4 {
858+
; AKF_HSA-LABEL: define {{[^@]+}}@func_sanitize_address
859+
; AKF_HSA-SAME: () #[[ATTR5]] {
860+
; AKF_HSA-NEXT: store volatile i32 0, i32 addrspace(1)* null, align 4
861+
; AKF_HSA-NEXT: ret void
862+
;
863+
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_sanitize_address
864+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR17]] {
865+
; ATTRIBUTOR_HSA-NEXT: store volatile i32 0, i32 addrspace(1)* null, align 4
866+
; ATTRIBUTOR_HSA-NEXT: ret void
867+
;
868+
store volatile i32 0, i32 addrspace(1)* null
869+
ret void
870+
}
871+
872+
; Implicit arguments need to be enabled for sanitizers
873+
define void @func_indirect_sanitize_address() #3 {
874+
; AKF_HSA-LABEL: define {{[^@]+}}@func_indirect_sanitize_address
875+
; AKF_HSA-SAME: () #[[ATTR3]] {
876+
; AKF_HSA-NEXT: call void @func_sanitize_address()
877+
; AKF_HSA-NEXT: ret void
878+
;
879+
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_indirect_sanitize_address
880+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR18:[0-9]+]] {
881+
; ATTRIBUTOR_HSA-NEXT: call void @func_sanitize_address()
882+
; ATTRIBUTOR_HSA-NEXT: ret void
883+
;
884+
call void @func_sanitize_address()
885+
ret void
886+
}
887+
888+
; Implicit arguments need to be enabled for sanitizers
889+
define amdgpu_kernel void @kern_indirect_sanitize_address() #3 {
890+
; AKF_HSA-LABEL: define {{[^@]+}}@kern_indirect_sanitize_address
891+
; AKF_HSA-SAME: () #[[ATTR4]] {
892+
; AKF_HSA-NEXT: call void @func_sanitize_address()
893+
; AKF_HSA-NEXT: ret void
894+
;
895+
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_indirect_sanitize_address
896+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR18]] {
897+
; ATTRIBUTOR_HSA-NEXT: call void @func_sanitize_address()
898+
; ATTRIBUTOR_HSA-NEXT: ret void
899+
;
900+
call void @func_sanitize_address()
901+
ret void
902+
}
903+
904+
; Marked with amdgpu-no-implicitarg-ptr, and
905+
; sanitize_address. sanitize_address wins and requires the pointer.
906+
declare void @extern_func_sanitize_address() #5
907+
908+
define amdgpu_kernel void @kern_decl_sanitize_address() #3 {
909+
; AKF_HSA-LABEL: define {{[^@]+}}@kern_decl_sanitize_address
910+
; AKF_HSA-SAME: () #[[ATTR4]] {
911+
; AKF_HSA-NEXT: call void @extern_func_sanitize_address()
912+
; AKF_HSA-NEXT: ret void
913+
;
914+
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_decl_sanitize_address
915+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR15]] {
916+
; ATTRIBUTOR_HSA-NEXT: call void @extern_func_sanitize_address()
917+
; ATTRIBUTOR_HSA-NEXT: ret void
918+
;
919+
call void @extern_func_sanitize_address()
920+
ret void
921+
}
922+
840923
attributes #0 = { nounwind readnone speculatable }
841924
attributes #1 = { nounwind "target-cpu"="fiji" }
842925
attributes #2 = { nounwind "target-cpu"="gfx900" }
843926
attributes #3 = { nounwind }
927+
attributes #4 = { nounwind sanitize_address }
928+
attributes #5 = { nounwind sanitize_address "amdgpu-no-implicitarg-ptr" }
844929

845930
;.
846931
; AKF_HSA: attributes #[[ATTR0:[0-9]+]] = { nounwind readnone speculatable willreturn }
847932
; AKF_HSA: attributes #[[ATTR1]] = { nounwind "target-cpu"="fiji" }
848933
; AKF_HSA: attributes #[[ATTR2]] = { nounwind "target-cpu"="gfx900" }
849934
; AKF_HSA: attributes #[[ATTR3]] = { nounwind }
850935
; AKF_HSA: attributes #[[ATTR4]] = { nounwind "amdgpu-calls" }
936+
; AKF_HSA: attributes #[[ATTR5]] = { nounwind sanitize_address }
937+
; AKF_HSA: attributes #[[ATTR6:[0-9]+]] = { nounwind sanitize_address "amdgpu-no-implicitarg-ptr" }
851938
;.
852939
; ATTRIBUTOR_HSA: attributes #[[ATTR0:[0-9]+]] = { nounwind readnone speculatable willreturn }
853940
; ATTRIBUTOR_HSA: attributes #[[ATTR1]] = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="fiji" "uniform-work-group-size"="false" }
@@ -866,5 +953,8 @@ attributes #3 = { nounwind }
866953
; ATTRIBUTOR_HSA: attributes #[[ATTR14]] = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="fiji" "uniform-work-group-size"="false" }
867954
; ATTRIBUTOR_HSA: attributes #[[ATTR15]] = { nounwind "uniform-work-group-size"="false" }
868955
; ATTRIBUTOR_HSA: attributes #[[ATTR16]] = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
869-
; ATTRIBUTOR_HSA: attributes #[[ATTR17]] = { nounwind }
956+
; ATTRIBUTOR_HSA: attributes #[[ATTR17]] = { nounwind sanitize_address "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
957+
; ATTRIBUTOR_HSA: attributes #[[ATTR18]] = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
958+
; ATTRIBUTOR_HSA: attributes #[[ATTR19:[0-9]+]] = { nounwind sanitize_address "amdgpu-no-implicitarg-ptr" "uniform-work-group-size"="false" }
959+
; ATTRIBUTOR_HSA: attributes #[[ATTR20]] = { nounwind }
870960
;.

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