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2 parents 5771d13 + 2d682ec commit 18bbdfcCopy full SHA for 18bbdfc
mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
@@ -1083,9 +1083,11 @@ def LinalgStructuredInterface : OpInterface<"LinalgOp"> {
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Operation::operand_range res{
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getOperation()->getOperands().begin() + getNumShapedOperands(),
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getOperation()->getOperands().end()};
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- for (Type t : TypeRange{res})
+ for (Type t : TypeRange{res}) {
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+ (void)t;
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assert((t.isSignlessIntOrIndexOrFloat() || t.template isa<VectorType>())
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&&"expected scalar or vector type");
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+ }
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return res;
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}
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