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[SimplifyCFG] SwitchToLookupTable(): don't increase ret count
The very next SimplifyCFG pass invocation will tail-merge these two ret's anyways, there is not much point in creating more work for ourselves.
1 parent 08efc2e commit 1901c98

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6 files changed

+64
-81
lines changed

6 files changed

+64
-81
lines changed

‎llvm/lib/Transforms/Utils/SimplifyCFG.cpp

Lines changed: 3 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -5926,7 +5926,6 @@ static bool SwitchToLookupTable(SwitchInst *SI, IRBuilder<> &Builder,
59265926
Updates.push_back({DominatorTree::Delete, BB, SI->getDefaultDest()});
59275927
}
59285928

5929-
bool ReturnedEarly = false;
59305929
for (PHINode *PHI : PHIs) {
59315930
const ResultListTy &ResultList = ResultLists[PHI];
59325931

@@ -5938,15 +5937,6 @@ static bool SwitchToLookupTable(SwitchInst *SI, IRBuilder<> &Builder,
59385937

59395938
Value *Result = Table.BuildLookup(TableIndex, Builder);
59405939

5941-
// If the result is used to return immediately from the function, we want to
5942-
// do that right here.
5943-
if (PHI->hasOneUse() && isa<ReturnInst>(*PHI->user_begin()) &&
5944-
PHI->user_back() == CommonDest->getFirstNonPHIOrDbg()) {
5945-
Builder.CreateRet(Result);
5946-
ReturnedEarly = true;
5947-
break;
5948-
}
5949-
59505940
// Do a small peephole optimization: re-use the switch table compare if
59515941
// possible.
59525942
if (!TableHasHoles && HasDefaultResults && RangeCheckBranch) {
@@ -5960,11 +5950,9 @@ static bool SwitchToLookupTable(SwitchInst *SI, IRBuilder<> &Builder,
59605950
PHI->addIncoming(Result, LookupBB);
59615951
}
59625952

5963-
if (!ReturnedEarly) {
5964-
Builder.CreateBr(CommonDest);
5965-
if (DTU)
5966-
Updates.push_back({DominatorTree::Insert, LookupBB, CommonDest});
5967-
}
5953+
Builder.CreateBr(CommonDest);
5954+
if (DTU)
5955+
Updates.push_back({DominatorTree::Insert, LookupBB, CommonDest});
59685956

59695957
// Remove the switch.
59705958
SmallPtrSet<BasicBlock *, 8> RemovedSuccessors;

‎llvm/test/Transforms/PhaseOrdering/X86/simplifycfg-late.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -11,15 +11,15 @@ define i32 @f(i32 %c) {
1111
; CHECK-NEXT: entry:
1212
; CHECK-NEXT: [[SWITCH_TABLEIDX:%.*]] = add i32 [[C:%.*]], -42
1313
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 7
14-
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[COMMON_RET:%.*]]
15-
; CHECK: common.ret:
16-
; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ [[SWITCH_LOAD:%.*]], [[SWITCH_LOOKUP]] ], [ 15, [[ENTRY:%.*]] ]
17-
; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
14+
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
1815
; CHECK: switch.lookup:
1916
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[SWITCH_TABLEIDX]] to i64
2017
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], [7 x i32]* @switch.table.f, i64 0, i64 [[TMP1]]
21-
; CHECK-NEXT: [[SWITCH_LOAD]] = load i32, i32* [[SWITCH_GEP]], align 4
22-
; CHECK-NEXT: br label [[COMMON_RET]]
18+
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
19+
; CHECK-NEXT: br label [[RETURN]]
20+
; CHECK: return:
21+
; CHECK-NEXT: [[R:%.*]] = phi i32 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 15, [[ENTRY:%.*]] ]
22+
; CHECK-NEXT: ret i32 [[R]]
2323
;
2424
entry:
2525
switch i32 %c, label %sw.default [

‎llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -11,14 +11,14 @@ define i32 @foo(i32 %x) #0 section ".tcm_text" {
1111
; ENABLE-LABEL: @foo(
1212
; ENABLE-NEXT: entry:
1313
; ENABLE-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X:%.*]], 6
14-
; ENABLE-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[COMMON_RET:%.*]]
15-
; ENABLE: common.ret:
16-
; ENABLE-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ [[SWITCH_LOAD:%.*]], [[SWITCH_LOOKUP]] ], [ 19, [[ENTRY:%.*]] ]
17-
; ENABLE-NEXT: ret i32 [[COMMON_RET_OP]]
14+
; ENABLE-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
1815
; ENABLE: switch.lookup:
1916
; ENABLE-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [6 x i32], [6 x i32]* @switch.table.foo, i32 0, i32 [[X]]
20-
; ENABLE-NEXT: [[SWITCH_LOAD]] = load i32, i32* [[SWITCH_GEP]], align 4
21-
; ENABLE-NEXT: br label [[COMMON_RET]]
17+
; ENABLE-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
18+
; ENABLE-NEXT: br label [[RETURN]]
19+
; ENABLE: return:
20+
; ENABLE-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 19, [[ENTRY:%.*]] ]
21+
; ENABLE-NEXT: ret i32 [[RETVAL_0]]
2222
;
2323
; DISABLE-LABEL: @foo(
2424
; DISABLE-NEXT: entry:

‎llvm/test/Transforms/SimplifyCFG/X86/disable-lookup-table.ll

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -52,9 +52,10 @@ define i32 @bar(i32 %c) {
5252
; CHECK: switch.lookup:
5353
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.bar, i32 0, i32 [[SWITCH_TABLEIDX]]
5454
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
55-
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
55+
; CHECK-NEXT: br label [[RETURN]]
5656
; CHECK: return:
57-
; CHECK-NEXT: ret i32 15
57+
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 15, [[ENTRY:%.*]] ]
58+
; CHECK-NEXT: ret i32 [[RETVAL_0]]
5859
;
5960
entry:
6061
switch i32 %c, label %sw.default [

‎llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll

Lines changed: 37 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -42,9 +42,10 @@ define i32 @f(i32 %c) {
4242
; CHECK: switch.lookup:
4343
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], [7 x i32]* @switch.table.f, i32 0, i32 [[SWITCH_TABLEIDX]]
4444
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
45-
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
45+
; CHECK-NEXT: br label [[RETURN]]
4646
; CHECK: return:
47-
; CHECK-NEXT: ret i32 15
47+
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 15, [[ENTRY:%.*]] ]
48+
; CHECK-NEXT: ret i32 [[RETVAL_0]]
4849
;
4950
entry:
5051
switch i32 %c, label %sw.default [
@@ -81,9 +82,10 @@ define i8 @char(i32 %c) {
8182
; CHECK: switch.lookup:
8283
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [9 x i8], [9 x i8]* @switch.table.char, i32 0, i32 [[SWITCH_TABLEIDX]]
8384
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i8, i8* [[SWITCH_GEP]], align 1
84-
; CHECK-NEXT: ret i8 [[SWITCH_LOAD]]
85+
; CHECK-NEXT: br label [[RETURN]]
8586
; CHECK: return:
86-
; CHECK-NEXT: ret i8 15
87+
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i8 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 15, [[ENTRY:%.*]] ]
88+
; CHECK-NEXT: ret i8 [[RETVAL_0]]
8789
;
8890
entry:
8991
switch i32 %c, label %sw.default [
@@ -172,9 +174,10 @@ define i8* @foostring(i32 %x) {
172174
; CHECK: switch.lookup:
173175
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* @switch.table.foostring, i32 0, i32 [[X]]
174176
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i8*, i8** [[SWITCH_GEP]], align 8
175-
; CHECK-NEXT: ret i8* [[SWITCH_LOAD]]
177+
; CHECK-NEXT: br label [[RETURN]]
176178
; CHECK: return:
177-
; CHECK-NEXT: ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str4, i64 0, i64 0)
179+
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i8* [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ getelementptr inbounds ([6 x i8], [6 x i8]* @.str4, i64 0, i64 0), [[ENTRY:%.*]] ]
180+
; CHECK-NEXT: ret i8* [[RETVAL_0]]
178181
;
179182
entry:
180183
switch i32 %x, label %sw.default [
@@ -210,9 +213,13 @@ define i32 @earlyreturncrash(i32 %x) {
210213
; CHECK: switch.lookup:
211214
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.earlyreturncrash, i32 0, i32 [[X]]
212215
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
213-
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
216+
; CHECK-NEXT: [[SWITCH_GEP1:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.earlyreturncrash.1, i32 0, i32 [[X]]
217+
; CHECK-NEXT: [[SWITCH_LOAD2:%.*]] = load i32, i32* [[SWITCH_GEP1]], align 4
218+
; CHECK-NEXT: br label [[SW_EPILOG]]
214219
; CHECK: sw.epilog:
215-
; CHECK-NEXT: ret i32 7
220+
; CHECK-NEXT: [[A_0:%.*]] = phi i32 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 7, [[ENTRY:%.*]] ]
221+
; CHECK-NEXT: [[B_0:%.*]] = phi i32 [ [[SWITCH_LOAD2]], [[SWITCH_LOOKUP]] ], [ 10, [[ENTRY]] ]
222+
; CHECK-NEXT: ret i32 [[A_0]]
216223
;
217224
entry:
218225
switch i32 %x, label %sw.default [
@@ -343,15 +350,12 @@ define i1 @undef(i32 %tmp) {
343350
; CHECK-LABEL: @undef(
344351
; CHECK-NEXT: bb:
345352
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[TMP:%.*]], 9
346-
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[BB3:%.*]]
347-
; CHECK: switch.lookup:
348353
; CHECK-NEXT: [[SWITCH_CAST:%.*]] = trunc i32 [[TMP]] to i9
349354
; CHECK-NEXT: [[SWITCH_SHIFTAMT:%.*]] = mul i9 [[SWITCH_CAST]], 1
350355
; CHECK-NEXT: [[SWITCH_DOWNSHIFT:%.*]] = lshr i9 3, [[SWITCH_SHIFTAMT]]
351356
; CHECK-NEXT: [[SWITCH_MASKED:%.*]] = trunc i9 [[SWITCH_DOWNSHIFT]] to i1
352-
; CHECK-NEXT: ret i1 [[SWITCH_MASKED]]
353-
; CHECK: bb3:
354-
; CHECK-NEXT: ret i1 undef
357+
; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP0]], i1 [[SWITCH_MASKED]], i1 undef
358+
; CHECK-NEXT: ret i1 [[TMP4]]
355359
;
356360
bb:
357361
switch i32 %tmp, label %bb3 [
@@ -384,9 +388,10 @@ define i32 @large(i32 %x) {
384388
; CHECK: switch.lookup:
385389
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [199 x i32], [199 x i32]* @switch.table.large, i32 0, i32 [[SWITCH_TABLEIDX]]
386390
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
387-
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
391+
; CHECK-NEXT: br label [[RETURN]]
388392
; CHECK: return:
389-
; CHECK-NEXT: ret i32 0
393+
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ]
394+
; CHECK-NEXT: ret i32 [[RETVAL_0]]
390395
;
391396
entry:
392397
%cmp = icmp slt i32 %x, 0
@@ -814,9 +819,10 @@ define i32 @cprop(i32 %x, i32 %y) {
814819
; CHECK: switch.lookup:
815820
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], [7 x i32]* @switch.table.cprop, i32 0, i32 [[SWITCH_TABLEIDX]]
816821
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
817-
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
822+
; CHECK-NEXT: br label [[RETURN]]
818823
; CHECK: return:
819-
; CHECK-NEXT: ret i32 123
824+
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 123, [[ENTRY:%.*]] ]
825+
; CHECK-NEXT: ret i32 [[RETVAL_0]]
820826
;
821827
entry:
822828
switch i32 %x, label %sw.default [
@@ -863,9 +869,10 @@ define i32 @unreachable_case(i32 %x) {
863869
; CHECK: switch.lookup:
864870
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [9 x i32], [9 x i32]* @switch.table.unreachable_case, i32 0, i32 [[X]]
865871
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
866-
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
872+
; CHECK-NEXT: br label [[RETURN]]
867873
; CHECK: return:
868-
; CHECK-NEXT: ret i32 2
874+
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 2, [[ENTRY:%.*]] ]
875+
; CHECK-NEXT: ret i32 [[RETVAL_0]]
869876
;
870877
entry:
871878
switch i32 %x, label %sw.default [
@@ -1080,9 +1087,10 @@ define i32 @threecases(i32 %c) {
10801087
; CHECK: switch.lookup:
10811088
; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [3 x i32], [3 x i32]* @switch.table.threecases, i32 0, i32 [[C]]
10821089
; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]], align 4
1083-
; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
1090+
; CHECK-NEXT: br label [[RETURN]]
10841091
; CHECK: return:
1085-
; CHECK-NEXT: ret i32 3
1092+
; CHECK-NEXT: [[X:%.*]] = phi i32 [ [[SWITCH_LOAD]], [[SWITCH_LOOKUP]] ], [ 3, [[ENTRY:%.*]] ]
1093+
; CHECK-NEXT: ret i32 [[X]]
10861094
;
10871095
entry:
10881096
switch i32 %c, label %sw.default [
@@ -1214,14 +1222,11 @@ define i8 @linearmap1(i32 %c) {
12141222
; CHECK-NEXT: entry:
12151223
; CHECK-NEXT: [[SWITCH_TABLEIDX:%.*]] = sub i32 [[C:%.*]], 10
12161224
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 4
1217-
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
1218-
; CHECK: switch.lookup:
12191225
; CHECK-NEXT: [[SWITCH_IDX_CAST:%.*]] = trunc i32 [[SWITCH_TABLEIDX]] to i8
12201226
; CHECK-NEXT: [[SWITCH_IDX_MULT:%.*]] = mul i8 [[SWITCH_IDX_CAST]], -5
12211227
; CHECK-NEXT: [[SWITCH_OFFSET:%.*]] = add i8 [[SWITCH_IDX_MULT]], 18
1222-
; CHECK-NEXT: ret i8 [[SWITCH_OFFSET]]
1223-
; CHECK: return:
1224-
; CHECK-NEXT: ret i8 3
1228+
; CHECK-NEXT: [[X:%.*]] = select i1 [[TMP0]], i8 [[SWITCH_OFFSET]], i8 3
1229+
; CHECK-NEXT: ret i8 [[X]]
12251230
;
12261231
entry:
12271232
switch i32 %c, label %sw.default [
@@ -1245,13 +1250,10 @@ define i32 @linearmap2(i8 %c) {
12451250
; CHECK-NEXT: entry:
12461251
; CHECK-NEXT: [[SWITCH_TABLEIDX:%.*]] = sub i8 [[C:%.*]], -13
12471252
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i8 [[SWITCH_TABLEIDX]], 4
1248-
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
1249-
; CHECK: switch.lookup:
12501253
; CHECK-NEXT: [[SWITCH_IDX_CAST:%.*]] = zext i8 [[SWITCH_TABLEIDX]] to i32
12511254
; CHECK-NEXT: [[SWITCH_OFFSET:%.*]] = add i32 [[SWITCH_IDX_CAST]], 18
1252-
; CHECK-NEXT: ret i32 [[SWITCH_OFFSET]]
1253-
; CHECK: return:
1254-
; CHECK-NEXT: ret i32 3
1255+
; CHECK-NEXT: [[X:%.*]] = select i1 [[TMP0]], i32 [[SWITCH_OFFSET]], i32 3
1256+
; CHECK-NEXT: ret i32 [[X]]
12551257
;
12561258
entry:
12571259
switch i8 %c, label %sw.default [
@@ -1275,13 +1277,10 @@ define i8 @linearmap3(i32 %c) {
12751277
; CHECK-NEXT: entry:
12761278
; CHECK-NEXT: [[SWITCH_TABLEIDX:%.*]] = sub i32 [[C:%.*]], 10
12771279
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 4
1278-
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
1279-
; CHECK: switch.lookup:
12801280
; CHECK-NEXT: [[SWITCH_IDX_CAST:%.*]] = trunc i32 [[SWITCH_TABLEIDX]] to i8
12811281
; CHECK-NEXT: [[SWITCH_IDX_MULT:%.*]] = mul i8 [[SWITCH_IDX_CAST]], 100
1282-
; CHECK-NEXT: ret i8 [[SWITCH_IDX_MULT]]
1283-
; CHECK: return:
1284-
; CHECK-NEXT: ret i8 3
1282+
; CHECK-NEXT: [[X:%.*]] = select i1 [[TMP0]], i8 [[SWITCH_IDX_MULT]], i8 3
1283+
; CHECK-NEXT: ret i8 [[X]]
12851284
;
12861285
entry:
12871286
switch i32 %c, label %sw.default [
@@ -1305,12 +1304,9 @@ define i8 @linearmap4(i32 %c) {
13051304
; CHECK-NEXT: entry:
13061305
; CHECK-NEXT: [[SWITCH_TABLEIDX:%.*]] = sub i32 [[C:%.*]], -2
13071306
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 4
1308-
; CHECK-NEXT: br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
1309-
; CHECK: switch.lookup:
13101307
; CHECK-NEXT: [[SWITCH_IDX_CAST:%.*]] = trunc i32 [[SWITCH_TABLEIDX]] to i8
1311-
; CHECK-NEXT: ret i8 [[SWITCH_IDX_CAST]]
1312-
; CHECK: return:
1313-
; CHECK-NEXT: ret i8 3
1308+
; CHECK-NEXT: [[X:%.*]] = select i1 [[TMP0]], i8 [[SWITCH_IDX_CAST]], i8 3
1309+
; CHECK-NEXT: ret i8 [[X]]
13141310
;
13151311
entry:
13161312
switch i32 %c, label %sw.default [

‎llvm/test/Transforms/SimplifyCFG/rangereduce.ll

Lines changed: 9 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -232,20 +232,18 @@ three:
232232

233233
define i8 @test7(i8 %a) optsize {
234234
; CHECK-LABEL: @test7(
235-
; CHECK-NEXT: [[TMP1:%.*]] = sub i8 [[A:%.*]], -36
236-
; CHECK-NEXT: [[TMP2:%.*]] = lshr i8 [[TMP1]], 2
237-
; CHECK-NEXT: [[TMP3:%.*]] = shl i8 [[TMP1]], 6
238-
; CHECK-NEXT: [[TMP4:%.*]] = or i8 [[TMP2]], [[TMP3]]
239-
; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i8 [[TMP4]], 4
240-
; CHECK-NEXT: br i1 [[TMP5]], label [[SWITCH_LOOKUP:%.*]], label [[COMMON_RET:%.*]]
241-
; CHECK: switch.lookup:
242-
; CHECK-NEXT: [[SWITCH_CAST:%.*]] = zext i8 [[TMP4]] to i32
235+
; CHECK-NEXT: common.ret:
236+
; CHECK-NEXT: [[TMP0:%.*]] = sub i8 [[A:%.*]], -36
237+
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[TMP0]], 2
238+
; CHECK-NEXT: [[TMP2:%.*]] = shl i8 [[TMP0]], 6
239+
; CHECK-NEXT: [[TMP3:%.*]] = or i8 [[TMP1]], [[TMP2]]
240+
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i8 [[TMP3]], 4
241+
; CHECK-NEXT: [[SWITCH_CAST:%.*]] = zext i8 [[TMP3]] to i32
243242
; CHECK-NEXT: [[SWITCH_SHIFTAMT:%.*]] = mul i32 [[SWITCH_CAST]], 8
244243
; CHECK-NEXT: [[SWITCH_DOWNSHIFT:%.*]] = lshr i32 -943228976, [[SWITCH_SHIFTAMT]]
245244
; CHECK-NEXT: [[SWITCH_MASKED:%.*]] = trunc i32 [[SWITCH_DOWNSHIFT]] to i8
246-
; CHECK-NEXT: ret i8 [[SWITCH_MASKED]]
247-
; CHECK: common.ret:
248-
; CHECK-NEXT: ret i8 -93
245+
; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = select i1 [[TMP4]], i8 [[SWITCH_MASKED]], i8 -93
246+
; CHECK-NEXT: ret i8 [[COMMON_RET_OP]]
249247
;
250248
switch i8 %a, label %def [
251249
i8 220, label %one

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