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[NFC][MC] Type [MC]Register uses in MachineTraceMetrics
Differential Revision: https://reviews.llvm.org/D89710
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+16
-16
lines changed

2 files changed

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-16
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llvm/include/llvm/CodeGen/MachineTraceMetrics.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -140,13 +140,13 @@ class MachineTraceMetrics : public MachineFunctionPass {
140140
/// successors.
141141
struct LiveInReg {
142142
/// The virtual register required, or a register unit.
143-
unsigned Reg;
143+
Register Reg;
144144

145145
/// For virtual registers: Minimum height of the defining instruction.
146146
/// For regunits: Height of the highest user in the trace.
147147
unsigned Height;
148148

149-
LiveInReg(unsigned Reg, unsigned Height = 0) : Reg(Reg), Height(Height) {}
149+
LiveInReg(Register Reg, unsigned Height = 0) : Reg(Reg), Height(Height) {}
150150
};
151151

152152
/// Per-basic block information that relates to a specific trace through the

llvm/lib/CodeGen/MachineTraceMetrics.cpp

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -701,17 +701,15 @@ static void updatePhysDepsDownwards(const MachineInstr *UseMI,
701701
SmallVectorImpl<DataDep> &Deps,
702702
SparseSet<LiveRegUnit> &RegUnits,
703703
const TargetRegisterInfo *TRI) {
704-
SmallVector<unsigned, 8> Kills;
704+
SmallVector<MCRegister, 8> Kills;
705705
SmallVector<unsigned, 8> LiveDefOps;
706706

707707
for (MachineInstr::const_mop_iterator MI = UseMI->operands_begin(),
708708
ME = UseMI->operands_end(); MI != ME; ++MI) {
709709
const MachineOperand &MO = *MI;
710-
if (!MO.isReg())
711-
continue;
712-
Register Reg = MO.getReg();
713-
if (!Register::isPhysicalRegister(Reg))
710+
if (!MO.isReg() || !MO.getReg().isPhysical())
714711
continue;
712+
MCRegister Reg = MO.getReg().asMCReg();
715713
// Track live defs and kills for updating RegUnits.
716714
if (MO.isDef()) {
717715
if (MO.isDead())
@@ -734,13 +732,14 @@ static void updatePhysDepsDownwards(const MachineInstr *UseMI,
734732

735733
// Update RegUnits to reflect live registers after UseMI.
736734
// First kills.
737-
for (unsigned Kill : Kills)
735+
for (MCRegister Kill : Kills)
738736
for (MCRegUnitIterator Units(Kill, TRI); Units.isValid(); ++Units)
739737
RegUnits.erase(*Units);
740738

741739
// Second, live defs.
742740
for (unsigned DefOp : LiveDefOps) {
743-
for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg(), TRI);
741+
for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg().asMCReg(),
742+
TRI);
744743
Units.isValid(); ++Units) {
745744
LiveRegUnit &LRU = RegUnits[*Units];
746745
LRU.MI = UseMI;
@@ -766,7 +765,7 @@ computeCrossBlockCriticalPath(const TraceBlockInfo &TBI) {
766765
assert(TBI.HasValidInstrHeights && "Missing height info");
767766
unsigned MaxLen = 0;
768767
for (const LiveInReg &LIR : TBI.LiveIns) {
769-
if (!Register::isVirtualRegister(LIR.Reg))
768+
if (!LIR.Reg.isVirtual())
770769
continue;
771770
const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
772771
// Ignore dependencies outside the current trace.
@@ -912,7 +911,8 @@ static unsigned updatePhysDepsUpwards(const MachineInstr &MI, unsigned Height,
912911
continue;
913912
// This is a def of Reg. Remove corresponding entries from RegUnits, and
914913
// update MI Height to consider the physreg dependencies.
915-
for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) {
914+
for (MCRegUnitIterator Units(Reg.asMCReg(), TRI); Units.isValid();
915+
++Units) {
916916
SparseSet<LiveRegUnit>::iterator I = RegUnits.find(*Units);
917917
if (I == RegUnits.end())
918918
continue;
@@ -930,15 +930,15 @@ static unsigned updatePhysDepsUpwards(const MachineInstr &MI, unsigned Height,
930930
}
931931

932932
// Now we know the height of MI. Update any regunits read.
933-
for (unsigned i = 0, e = ReadOps.size(); i != e; ++i) {
934-
Register Reg = MI.getOperand(ReadOps[i]).getReg();
933+
for (size_t I = 0, E = ReadOps.size(); I != E; ++I) {
934+
MCRegister Reg = MI.getOperand(ReadOps[I]).getReg().asMCReg();
935935
for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) {
936936
LiveRegUnit &LRU = RegUnits[*Units];
937937
// Set the height to the highest reader of the unit.
938938
if (LRU.Cycle <= Height && LRU.MI != &MI) {
939939
LRU.Cycle = Height;
940940
LRU.MI = &MI;
941-
LRU.Op = ReadOps[i];
941+
LRU.Op = ReadOps[I];
942942
}
943943
}
944944
}
@@ -979,7 +979,7 @@ void MachineTraceMetrics::Ensemble::
979979
addLiveIns(const MachineInstr *DefMI, unsigned DefOp,
980980
ArrayRef<const MachineBasicBlock*> Trace) {
981981
assert(!Trace.empty() && "Trace should contain at least one block");
982-
unsigned Reg = DefMI->getOperand(DefOp).getReg();
982+
Register Reg = DefMI->getOperand(DefOp).getReg();
983983
assert(Register::isVirtualRegister(Reg));
984984
const MachineBasicBlock *DefMBB = DefMI->getParent();
985985

@@ -1027,7 +1027,7 @@ computeInstrHeights(const MachineBasicBlock *MBB) {
10271027
if (MBB) {
10281028
TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
10291029
for (LiveInReg &LI : TBI.LiveIns) {
1030-
if (Register::isVirtualRegister(LI.Reg)) {
1030+
if (LI.Reg.isVirtual()) {
10311031
// For virtual registers, the def latency is included.
10321032
unsigned &Height = Heights[MTM.MRI->getVRegDef(LI.Reg)];
10331033
if (Height < LI.Height)

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