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1 | 1 | ; RUN: opt < %s -disable-output "-passes=print<ddg>" 2>&1 | FileCheck %s
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2 | 2 |
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3 | 3 | ; CHECK-LABEL: 'DDG' for loop 'test1.for.body':
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4 |
| -; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:single-instruction |
| 4 | + |
| 5 | +; CHECK: Node Address:[[PI:0x[0-9a-f]*]]:pi-block |
| 6 | +; CHECK-NEXT: --- start of nodes in pi-block --- |
| 7 | +; CHECK-NEXT: Node Address:[[N10:0x[0-9a-f]*]]:single-instruction |
| 8 | +; CHECK-NEXT: Instructions: |
| 9 | +; CHECK-NEXT: %inc = add i64 %i.02, 1 |
| 10 | +; CHECK-NEXT: Edges: |
| 11 | +; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]] |
| 12 | + |
| 13 | +; CHECK: Node Address:[[N11]]:single-instruction |
| 14 | +; CHECK-NEXT: Instructions: |
| 15 | +; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test1.for.body ], [ 0, %test1.for.body.preheader ] |
| 16 | +; CHECK-NEXT: Edges: |
| 17 | +; CHECK-NEXT: [def-use] to [[N10]] |
| 18 | +; CHECK-NEXT: --- end of nodes in pi-block --- |
| 19 | +; CHECK-NEXT: Edges: |
| 20 | +; CHECK-NEXT: [def-use] to [[N1:0x[0-9a-f]*]] |
| 21 | +; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]] |
| 22 | +; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]] |
| 23 | + |
| 24 | +; CHECK: Node Address:[[N7]]:single-instruction |
| 25 | +; CHECK-NEXT: Instructions: |
| 26 | +; CHECK-NEXT: %exitcond = icmp ne i64 %inc, %n |
| 27 | +; CHECK-NEXT: Edges: |
| 28 | +; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]] |
| 29 | + |
| 30 | +; CHECK: Node Address:[[N8]]:single-instruction |
| 31 | +; CHECK-NEXT: Instructions: |
| 32 | +; CHECK-NEXT: br i1 %exitcond, label %test1.for.body, label %for.end.loopexit |
| 33 | +; CHECK-NEXT: Edges:none! |
| 34 | + |
| 35 | +; CHECK: Node Address:[[N6]]:single-instruction |
| 36 | +; CHECK-NEXT: Instructions: |
| 37 | +; CHECK-NEXT: %arrayidx1 = getelementptr inbounds float, float* %a, i64 %i.02 |
| 38 | +; CHECK-NEXT: Edges: |
| 39 | +; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]] |
| 40 | + |
| 41 | +; CHECK: Node Address:[[N1]]:single-instruction |
5 | 42 | ; CHECK-NEXT: Instructions:
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6 | 43 | ; CHECK-NEXT: %arrayidx = getelementptr inbounds float, float* %b, i64 %i.02
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7 | 44 | ; CHECK-NEXT: Edges:
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23 | 60 | ; CHECK-NEXT: Instructions:
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24 | 61 | ; CHECK-NEXT: %add = fadd float %0, %conv
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25 | 62 | ; CHECK-NEXT: Edges:
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26 |
| -; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]] |
27 |
| - |
28 |
| -; CHECK: Node Address:[[N6:0x[0-9a-f]*]]:single-instruction |
29 |
| -; CHECK-NEXT: Instructions: |
30 |
| -; CHECK-NEXT: %arrayidx1 = getelementptr inbounds float, float* %a, i64 %i.02 |
31 |
| -; CHECK-NEXT: Edges: |
32 | 63 | ; CHECK-NEXT: [def-use] to [[N5]]
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33 | 64 |
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34 | 65 | ; CHECK: Node Address:[[N5]]:single-instruction
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35 | 66 | ; CHECK-NEXT: Instructions:
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36 | 67 | ; CHECK-NEXT: store float %add, float* %arrayidx1, align 4
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37 | 68 | ; CHECK-NEXT: Edges:none!
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38 | 69 |
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39 |
| -; CHECK: Node Address:[[N7:0x[0-9a-f]*]]:single-instruction |
40 |
| -; CHECK-NEXT: Instructions: |
41 |
| -; CHECK-NEXT: %exitcond = icmp ne i64 %inc, %n |
42 |
| -; CHECK-NEXT: Edges: |
43 |
| -; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]] |
44 |
| - |
45 |
| -; CHECK: Node Address:[[N8]]:single-instruction |
46 |
| -; CHECK-NEXT: Instructions: |
47 |
| -; CHECK-NEXT: br i1 %exitcond, label %test1.for.body, label %for.end.loopexit |
48 |
| -; CHECK-NEXT: Edges:none! |
49 |
| - |
50 |
| -; CHECK: Node Address:[[N9:0x[0-9a-f]*]]:pi-block |
51 |
| -; CHECK-NEXT: --- start of nodes in pi-block --- |
52 |
| -; CHECK-NEXT: Node Address:[[N10:0x[0-9a-f]*]]:single-instruction |
53 |
| -; CHECK-NEXT: Instructions: |
54 |
| -; CHECK-NEXT: %inc = add i64 %i.02, 1 |
55 |
| -; CHECK-NEXT: Edges: |
56 |
| -; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]] |
57 |
| - |
58 |
| -; CHECK: Node Address:[[N11]]:single-instruction |
59 |
| -; CHECK-NEXT: Instructions: |
60 |
| -; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test1.for.body ], [ 0, %test1.for.body.preheader ] |
61 |
| -; CHECK-NEXT: Edges: |
62 |
| -; CHECK-NEXT: [def-use] to [[N10]] |
63 |
| -; CHECK-NEXT: --- end of nodes in pi-block --- |
64 |
| -; CHECK-NEXT: Edges: |
65 |
| -; CHECK-NEXT: [def-use] to [[N1]] |
66 |
| -; CHECK-NEXT: [def-use] to [[N6]] |
67 |
| -; CHECK-NEXT: [def-use] to [[N7]] |
68 |
| - |
69 | 70 |
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70 | 71 | ;; No memory dependencies.
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71 | 72 | ;; void test1(unsigned long n, float * restrict a, float * restrict b) {
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@@ -96,78 +97,80 @@ for.end: ; preds = %test1.for.body, %en
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96 | 97 |
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97 | 98 |
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98 | 99 | ; CHECK-LABEL: 'DDG' for loop 'test2.for.body':
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99 |
| -; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:single-instruction |
100 |
| -; CHECK-NEXT: Instructions: |
101 |
| -; CHECK-NEXT: %arrayidx = getelementptr inbounds float, float* %b, i64 %i.02 |
102 |
| -; CHECK-NEXT: Edges: |
103 |
| -; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]] |
104 | 100 |
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105 |
| -; CHECK: Node Address:[[N2]]:single-instruction |
| 101 | +; CHECK: Node Address:[[PI:0x[0-9a-f]*]]:pi-block |
| 102 | +; CHECK-NEXT: --- start of nodes in pi-block --- |
| 103 | +; CHECK: Node Address:[[N11:0x[0-9a-f]*]]:single-instruction |
106 | 104 | ; CHECK-NEXT: Instructions:
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107 |
| -; CHECK-NEXT: %0 = load float, float* %arrayidx, align 4 |
| 105 | +; CHECK-NEXT: %inc = add i64 %i.02, 1 |
108 | 106 | ; CHECK-NEXT: Edges:
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109 |
| -; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]] |
| 107 | +; CHECK-NEXT: [def-use] to [[N12:0x[0-9a-f]*]] |
110 | 108 |
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111 |
| -; CHECK: Node Address:[[N4:0x[0-9a-f]*]]:single-instruction |
| 109 | +; CHECK: Node Address:[[N12]]:single-instruction |
112 | 110 | ; CHECK-NEXT: Instructions:
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113 |
| -; CHECK-NEXT: %arrayidx1 = getelementptr inbounds float, float* %a, i64 %i.02 |
| 111 | +; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test2.for.body ], [ 0, %test2.for.body.preheader ] |
114 | 112 | ; CHECK-NEXT: Edges:
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115 |
| -; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]] |
| 113 | +; CHECK-NEXT: [def-use] to [[N11]] |
| 114 | +; CHECK-NEXT: --- end of nodes in pi-block --- |
| 115 | +; CHECK-NEXT: Edges: |
| 116 | +; CHECK-NEXT: [def-use] to [[N1:0x[0-9a-f]*]] |
| 117 | +; CHECK-NEXT: [def-use] to [[N4:0x[0-9a-f]*]] |
| 118 | +; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]] |
| 119 | +; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]] |
116 | 120 |
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117 |
| -; CHECK: Node Address:[[N5]]:single-instruction |
| 121 | +; CHECK: Node Address:[[N8]]:single-instruction |
118 | 122 | ; CHECK-NEXT: Instructions:
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119 |
| -; CHECK-NEXT: %1 = load float, float* %arrayidx1, align 4 |
| 123 | +; CHECK-NEXT: %exitcond = icmp ne i64 %inc, %n |
120 | 124 | ; CHECK-NEXT: Edges:
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121 |
| -; CHECK-NEXT: [def-use] to [[N3]] |
122 |
| -; CHECK-NEXT: [memory] to [[N6:0x[0-9a-f]*]] |
| 125 | +; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]] |
123 | 126 |
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124 |
| -; CHECK: Node Address:[[N3]]:single-instruction |
| 127 | +; CHECK: Node Address:[[N9]]:single-instruction |
125 | 128 | ; CHECK-NEXT: Instructions:
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126 |
| -; CHECK-NEXT: %add = fadd float %0, %1 |
127 |
| -; CHECK-NEXT: Edges: |
128 |
| -; CHECK-NEXT: [def-use] to [[N6]] |
| 129 | +; CHECK-NEXT: br i1 %exitcond, label %test2.for.body, label %for.end.loopexit |
| 130 | +; CHECK-NEXT: Edges:none! |
129 | 131 |
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130 |
| -; CHECK: Node Address:[[N7:0x[0-9a-f]*]]:single-instruction |
| 132 | +; CHECK: Node Address:[[N7]]:single-instruction |
131 | 133 | ; CHECK-NEXT: Instructions:
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132 | 134 | ; CHECK-NEXT: %arrayidx2 = getelementptr inbounds float, float* %a, i64 %i.02
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133 | 135 | ; CHECK-NEXT: Edges:
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134 |
| -; CHECK-NEXT: [def-use] to [[N6]] |
| 136 | +; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]] |
135 | 137 |
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136 |
| -; CHECK: Node Address:[[N6]]:single-instruction |
| 138 | +; CHECK: Node Address:[[N4]]:single-instruction |
137 | 139 | ; CHECK-NEXT: Instructions:
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138 |
| -; CHECK-NEXT: store float %add, float* %arrayidx2, align 4 |
139 |
| -; CHECK-NEXT: Edges:none! |
| 140 | +; CHECK-NEXT: %arrayidx1 = getelementptr inbounds float, float* %a, i64 %i.02 |
| 141 | +; CHECK-NEXT: Edges: |
| 142 | +; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]] |
140 | 143 |
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141 |
| -; CHECK: Node Address:[[N8:0x[0-9a-f]*]]:single-instruction |
| 144 | +; CHECK: Node Address:[[N5]]:single-instruction |
142 | 145 | ; CHECK-NEXT: Instructions:
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143 |
| -; CHECK-NEXT: %exitcond = icmp ne i64 %inc, %n |
| 146 | +; CHECK-NEXT: %1 = load float, float* %arrayidx1, align 4 |
144 | 147 | ; CHECK-NEXT: Edges:
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145 |
| -; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]] |
| 148 | +; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]] |
| 149 | +; CHECK-NEXT: [memory] to [[N6]] |
146 | 150 |
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147 |
| -; CHECK: Node Address:[[N9]]:single-instruction |
| 151 | +; CHECK: Node Address:[[N1]]:single-instruction |
148 | 152 | ; CHECK-NEXT: Instructions:
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149 |
| -; CHECK-NEXT: br i1 %exitcond, label %test2.for.body, label %for.end.loopexit |
150 |
| -; CHECK-NEXT: Edges:none! |
| 153 | +; CHECK-NEXT: %arrayidx = getelementptr inbounds float, float* %b, i64 %i.02 |
| 154 | +; CHECK-NEXT: Edges: |
| 155 | +; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]] |
151 | 156 |
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152 |
| -; CHECK: Node Address:[[N10:0x[0-9a-f]*]]:pi-block |
153 |
| -; CHECK-NEXT: --- start of nodes in pi-block --- |
154 |
| -; CHECK: Node Address:[[N11:0x[0-9a-f]*]]:single-instruction |
| 157 | +; CHECK: Node Address:[[N2]]:single-instruction |
155 | 158 | ; CHECK-NEXT: Instructions:
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156 |
| -; CHECK-NEXT: %inc = add i64 %i.02, 1 |
| 159 | +; CHECK-NEXT: %0 = load float, float* %arrayidx, align 4 |
157 | 160 | ; CHECK-NEXT: Edges:
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158 |
| -; CHECK-NEXT: [def-use] to [[N12:0x[0-9a-f]*]] |
| 161 | +; CHECK-NEXT: [def-use] to [[N3]] |
159 | 162 |
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160 |
| -; CHECK: Node Address:[[N12]]:single-instruction |
| 163 | +; CHECK: Node Address:[[N3]]:single-instruction |
161 | 164 | ; CHECK-NEXT: Instructions:
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162 |
| -; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test2.for.body ], [ 0, %test2.for.body.preheader ] |
163 |
| -; CHECK-NEXT: Edges: |
164 |
| -; CHECK-NEXT: [def-use] to [[N11]] |
165 |
| -; CHECK-NEXT: --- end of nodes in pi-block --- |
| 165 | +; CHECK-NEXT: %add = fadd float %0, %1 |
166 | 166 | ; CHECK-NEXT: Edges:
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167 |
| -; CHECK-NEXT: [def-use] to [[N1]] |
168 |
| -; CHECK-NEXT: [def-use] to [[N4]] |
169 |
| -; CHECK-NEXT: [def-use] to [[N7]] |
170 |
| -; CHECK-NEXT: [def-use] to [[N8]] |
| 167 | +; CHECK-NEXT: [def-use] to [[N6]] |
| 168 | + |
| 169 | +; CHECK: Node Address:[[N6]]:single-instruction |
| 170 | +; CHECK-NEXT: Instructions: |
| 171 | +; CHECK-NEXT: store float %add, float* %arrayidx2, align 4 |
| 172 | +; CHECK-NEXT: Edges:none! |
| 173 | + |
171 | 174 |
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172 | 175 |
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173 | 176 | ;; Loop-independent memory dependencies.
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