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[mlir][sparse] add doubly compressed test case to assembly op (llvm#81687)
Removes audit TODO
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2 files changed

+40
-9
lines changed

2 files changed

+40
-9
lines changed

mlir/include/mlir/ExecutionEngine/SparseTensor/Storage.h

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -465,9 +465,6 @@ class SparseTensorStorage final : public SparseTensorStorageBase {
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/// Computes the assembled-size associated with the `l`-th level,
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/// given the assembled-size associated with the `(l-1)`-th level.
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/// "Assembled-sizes" correspond to the (nominal) sizes of overhead
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/// storage, as opposed to "level-sizes" which are the cardinality
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/// of possible coordinates for that level.
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uint64_t assembledSize(uint64_t parentSz, uint64_t l) const {
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if (isCompressedLvl(l))
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return positions[l][parentSz];
@@ -764,11 +761,6 @@ SparseTensorStorage<P, C, V>::SparseTensorStorage(
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// Note that none of the buffers can be reused because ownership
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// of the memory passed from clients is not necessarily transferred.
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// Therefore, all data is copied over into a new SparseTensorStorage.
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//
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// TODO: this needs to be generalized to all formats AND
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// we need a proper audit of e.g. double compressed
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// levels where some are not filled
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//
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uint64_t trailCOOLen = 0, parentSz = 1, bufIdx = 0;
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for (uint64_t l = 0; l < lvlRank; l++) {
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if (!isUniqueLvl(l) && (isCompressedLvl(l) || isLooseCompressedLvl(l))) {

mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir

Lines changed: 40 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,12 @@
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// REDEFINE: %{sparsifier_opts} = enable-runtime-library=false
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// RUN: %{compile} | %{run} | FileCheck %s
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#CCC = #sparse_tensor.encoding<{
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map = (d0, d1, d2) -> (d0 : compressed, d1 : compressed, d2 : compressed),
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posWidth = 64,
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crdWidth = 32
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}>
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#BatchedCSR = #sparse_tensor.encoding<{
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map = (d0, d1, d2) -> (d0 : dense, d1 : dense, d2 : compressed),
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posWidth = 64,
@@ -35,7 +41,9 @@
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crdWidth = 32
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}>
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// Test with batched-CSR and CSR-dense.
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//
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// Test assembly operation with CCC, batched-CSR and CSR-dense.
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//
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module {
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//
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// Main driver.
@@ -44,6 +52,31 @@ module {
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%c0 = arith.constant 0 : index
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%f0 = arith.constant 0.0 : f32
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//
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// Setup CCC.
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//
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%data0 = arith.constant dense<
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[ 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0 ]> : tensor<8xf32>
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%pos00 = arith.constant dense<
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[ 0, 3 ]> : tensor<2xi64>
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%crd00 = arith.constant dense<
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[ 0, 2, 3 ]> : tensor<3xi32>
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%pos01 = arith.constant dense<
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[ 0, 2, 4, 5 ]> : tensor<4xi64>
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%crd01 = arith.constant dense<
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[ 0, 1, 1, 2, 1 ]> : tensor<5xi32>
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%pos02 = arith.constant dense<
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[ 0, 2, 4, 5, 7, 8 ]> : tensor<6xi64>
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%crd02 = arith.constant dense<
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[ 0, 1, 0, 1, 0, 0, 1, 0 ]> : tensor<8xi32>
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%s0 = sparse_tensor.assemble %data0, %pos00, %crd00, %pos01, %crd01, %pos02, %crd02 :
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tensor<8xf32>,
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tensor<2xi64>, tensor<3xi32>,
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tensor<4xi64>, tensor<5xi32>,
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tensor<6xi64>, tensor<8xi32> to tensor<4x3x2xf32, #CCC>
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//
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// Setup BatchedCSR.
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//
@@ -75,10 +108,15 @@ module {
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//
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// Verify.
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//
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// CHECK: ( ( ( 1, 2 ), ( 3, 4 ), ( 0, 0 ) ), ( ( 0, 0 ), ( 0, 0 ), ( 0, 0 ) ), ( ( 0, 0 ), ( 5, 0 ), ( 6, 7 ) ), ( ( 0, 0 ), ( 8, 0 ), ( 0, 0 ) ) )
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// CHECK: ( ( ( 1, 2 ), ( 0, 3 ), ( 4, 0 ) ), ( ( 5, 6 ), ( 0, 0 ), ( 0, 7 ) ), ( ( 8, 9 ), ( 10, 11 ), ( 12, 13 ) ), ( ( 14, 0 ), ( 0, 15 ), ( 0, 16 ) ) )
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// CHECK: ( ( ( 1, 2 ), ( 0, 3 ), ( 4, 0 ) ), ( ( 5, 6 ), ( 0, 0 ), ( 0, 7 ) ), ( ( 8, 9 ), ( 10, 11 ), ( 12, 13 ) ), ( ( 14, 0 ), ( 0, 15 ), ( 0, 16 ) ) )
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//
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%d0 = sparse_tensor.convert %s0 : tensor<4x3x2xf32, #CCC> to tensor<4x3x2xf32>
117+
%v0 = vector.transfer_read %d0[%c0, %c0, %c0], %f0 : tensor<4x3x2xf32>, vector<4x3x2xf32>
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vector.print %v0 : vector<4x3x2xf32>
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%d1 = sparse_tensor.convert %s1 : tensor<4x3x2xf32, #BatchedCSR> to tensor<4x3x2xf32>
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%v1 = vector.transfer_read %d1[%c0, %c0, %c0], %f0 : tensor<4x3x2xf32>, vector<4x3x2xf32>
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vector.print %v1 : vector<4x3x2xf32>
@@ -88,6 +126,7 @@ module {
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vector.print %v2 : vector<4x3x2xf32>
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// FIXME: doing this explicitly crashes runtime
129+
// bufferization.dealloc_tensor %s0 : tensor<4x3x2xf32, #CCC>
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// bufferization.dealloc_tensor %s1 : tensor<4x3x2xf32, #BatchedCSR>
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// bufferization.dealloc_tensor %s2 : tensor<4x3x2xf32, #CSRDense>
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return

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