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[AMDGPU] SIFoldOperands: make tryFoldCndMask a member function. NFC.
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+16
-16
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+16
-16
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llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -90,6 +90,7 @@ class SIFoldOperands : public MachineFunctionPass {
9090
SmallVectorImpl<FoldCandidate> &FoldList,
9191
SmallVectorImpl<MachineInstr *> &CopiesToReplace) const;
9292

93+
bool tryFoldCndMask(MachineInstr &MI) const;
9394
void foldInstOperand(MachineInstr &MI, MachineOperand &OpToFold) const;
9495

9596
const MachineOperand *isClamp(const MachineInstr &MI) const;
@@ -1146,39 +1147,38 @@ static bool tryConstantFoldOp(MachineRegisterInfo &MRI,
11461147
}
11471148

11481149
// Try to fold an instruction into a simpler one
1149-
static bool tryFoldCndMask(const SIInstrInfo *TII,
1150-
MachineInstr *MI) {
1151-
unsigned Opc = MI->getOpcode();
1150+
bool SIFoldOperands::tryFoldCndMask(MachineInstr &MI) const {
1151+
unsigned Opc = MI.getOpcode();
11521152
if (Opc != AMDGPU::V_CNDMASK_B32_e32 && Opc != AMDGPU::V_CNDMASK_B32_e64 &&
11531153
Opc != AMDGPU::V_CNDMASK_B64_PSEUDO)
11541154
return false;
11551155

1156-
MachineOperand *Src0 = TII->getNamedOperand(*MI, AMDGPU::OpName::src0);
1157-
MachineOperand *Src1 = TII->getNamedOperand(*MI, AMDGPU::OpName::src1);
1156+
MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
1157+
MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
11581158
if (!Src1->isIdenticalTo(*Src0))
11591159
return false;
11601160

11611161
int Src1ModIdx =
11621162
AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1_modifiers);
11631163
int Src0ModIdx =
11641164
AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0_modifiers);
1165-
if ((Src1ModIdx != -1 && MI->getOperand(Src1ModIdx).getImm() != 0) ||
1166-
(Src0ModIdx != -1 && MI->getOperand(Src0ModIdx).getImm() != 0))
1165+
if ((Src1ModIdx != -1 && MI.getOperand(Src1ModIdx).getImm() != 0) ||
1166+
(Src0ModIdx != -1 && MI.getOperand(Src0ModIdx).getImm() != 0))
11671167
return false;
11681168

1169-
LLVM_DEBUG(dbgs() << "Folded " << *MI << " into ");
1169+
LLVM_DEBUG(dbgs() << "Folded " << MI << " into ");
11701170
auto &NewDesc =
11711171
TII->get(Src0->isReg() ? (unsigned)AMDGPU::COPY : getMovOpc(false));
11721172
int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
11731173
if (Src2Idx != -1)
1174-
MI->RemoveOperand(Src2Idx);
1175-
MI->RemoveOperand(AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1));
1174+
MI.RemoveOperand(Src2Idx);
1175+
MI.RemoveOperand(AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1));
11761176
if (Src1ModIdx != -1)
1177-
MI->RemoveOperand(Src1ModIdx);
1177+
MI.RemoveOperand(Src1ModIdx);
11781178
if (Src0ModIdx != -1)
1179-
MI->RemoveOperand(Src0ModIdx);
1180-
mutateCopyOp(*MI, NewDesc);
1181-
LLVM_DEBUG(dbgs() << *MI);
1179+
MI.RemoveOperand(Src0ModIdx);
1180+
mutateCopyOp(MI, NewDesc);
1181+
LLVM_DEBUG(dbgs() << MI);
11821182
return true;
11831183
}
11841184

@@ -1300,7 +1300,7 @@ void SIFoldOperands::foldInstOperand(MachineInstr &MI,
13001300
LLVM_DEBUG(dbgs() << "Folded source from " << MI << " into OpNo "
13011301
<< static_cast<int>(Fold.UseOpNo) << " of "
13021302
<< *Fold.UseMI);
1303-
if (tryFoldCndMask(TII, Fold.UseMI))
1303+
if (tryFoldCndMask(*Fold.UseMI))
13041304
Folded.insert(Fold.UseMI);
13051305
} else if (Fold.isCommuted()) {
13061306
// Restoring instruction's original operand order if fold has failed.
@@ -1723,7 +1723,7 @@ bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) {
17231723
for (MachineBasicBlock *MBB : depth_first(&MF)) {
17241724
MachineOperand *CurrentKnownM0Val = nullptr;
17251725
for (auto &MI : make_early_inc_range(*MBB)) {
1726-
tryFoldCndMask(TII, &MI);
1726+
tryFoldCndMask(MI);
17271727

17281728
if (MI.isRegSequence() && tryFoldRegSequence(MI))
17291729
continue;

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