Skip to content

Commit 3446ee5

Browse files
committed
arm64_32: only use 4-byte stack slot for tail call pointer args
1 parent 6594a47 commit 3446ee5

File tree

2 files changed

+12
-1
lines changed

2 files changed

+12
-1
lines changed

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5482,7 +5482,8 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
54825482
// common case. It should also work for fundamental types too.
54835483
uint32_t BEAlign = 0;
54845484
unsigned OpSize;
5485-
if (VA.getLocInfo() == CCValAssign::Indirect)
5485+
if (VA.getLocInfo() == CCValAssign::Indirect ||
5486+
VA.getLocInfo() == CCValAssign::Trunc)
54865487
OpSize = VA.getLocVT().getFixedSizeInBits();
54875488
else
54885489
OpSize = Flags.isByVal() ? Flags.getByValSize() * 8
Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
; RUN: llc -mtriple=arm64_32-apple-watchos %s -o - | FileCheck %s
2+
3+
declare swifttailcc void @pointer_align_callee([8 x i64], i32, i32, i32, i8*)
4+
define swifttailcc void @pointer_align_caller(i8* swiftasync %as, i8* %in) "frame-pointer"="all" {
5+
; CHECK-LABEL: pointer_align_caller:
6+
; CHECK: b _pointer_align_callee
7+
alloca i32
8+
musttail call swifttailcc void @pointer_align_callee([8 x i64] undef, i32 0, i32 1, i32 2, i8* %in)
9+
ret void
10+
}

0 commit comments

Comments
 (0)