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[AMDGPU] Regenerate tests to include -NEXT. NFC.
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2 files changed

+83
-74
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2 files changed

+83
-74
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‎llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir

Lines changed: 57 additions & 51 deletions
Original file line numberDiff line numberDiff line change
@@ -22,57 +22,63 @@ frameInfo:
2222
body: |
2323
; CHECK-LABEL: name: could_not_use_debug_inst_to_query_mi2mimap
2424
; CHECK: bb.0:
25-
; CHECK: successors: %bb.1(0x80000000)
26-
; CHECK: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
27-
; CHECK: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
28-
; CHECK: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
29-
; CHECK: [[DEF3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
30-
; CHECK: [[DEF4:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
31-
; CHECK: [[DEF5:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
32-
; CHECK: [[DEF6:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
33-
; CHECK: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
34-
; CHECK: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
35-
; CHECK: %9:vgpr_32 = nofpexcept V_MUL_F32_e32 1082130432, [[DEF1]], implicit $mode, implicit $exec
36-
; CHECK: [[DEF9:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
37-
; CHECK: [[DEF10:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
38-
; CHECK: bb.1:
39-
; CHECK: successors: %bb.2(0x80000000)
40-
; CHECK: DBG_VALUE
41-
; CHECK: DBG_VALUE
42-
; CHECK: DBG_VALUE
43-
; CHECK: bb.2:
44-
; CHECK: successors: %bb.3(0x80000000)
45-
; CHECK: S_BRANCH %bb.3
46-
; CHECK: bb.3:
47-
; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
48-
; CHECK: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
49-
; CHECK: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
50-
; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B32_e32_]]
51-
; CHECK: %16:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF7]], [[DEF7]], implicit $mode, implicit $exec
52-
; CHECK: %17:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF7]], [[DEF7]], implicit $mode, implicit $exec
53-
; CHECK: %18:vgpr_32 = nofpexcept V_MUL_F32_e32 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_]], implicit $mode, implicit $exec
54-
; CHECK: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
55-
; CHECK: [[DEF13:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
56-
; CHECK: %21:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_]], implicit $mode, implicit $exec
57-
; CHECK: %22:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF7]], [[DEF7]], implicit $mode, implicit $exec
58-
; CHECK: dead %23:vgpr_32 = nofpexcept V_MUL_F32_e32 %22, [[DEF13]], implicit $mode, implicit $exec
59-
; CHECK: dead [[V_MOV_B32_e32_1]]:vgpr_32 = nofpexcept V_MAC_F32_e32 %21, [[COPY]], [[V_MOV_B32_e32_1]], implicit $mode, implicit $exec
60-
; CHECK: [[DEF14:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
61-
; CHECK: $sgpr4 = IMPLICIT_DEF
62-
; CHECK: $vgpr0 = COPY [[DEF11]]
63-
; CHECK: $vgpr0 = COPY [[V_MOV_B32_e32_]]
64-
; CHECK: $vgpr1 = COPY [[DEF7]]
65-
; CHECK: $vgpr0 = COPY %16
66-
; CHECK: $vgpr1 = COPY %17
67-
; CHECK: $vgpr2 = COPY %18
68-
; CHECK: dead $sgpr30_sgpr31 = SI_CALL [[DEF14]], @foo, csr_amdgpu_highregs, implicit undef $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $sgpr4, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit-def $vgpr0
69-
; CHECK: %25:vgpr_32 = nofpexcept V_ADD_F32_e32 %9, [[DEF8]], implicit $mode, implicit $exec
70-
; CHECK: %25:vgpr_32 = nofpexcept V_MAC_F32_e32 [[DEF12]], [[DEF9]], %25, implicit $mode, implicit $exec
71-
; CHECK: dead %26:vgpr_32 = nofpexcept V_MAD_F32_e64 0, %25, 0, [[DEF4]], 0, [[DEF1]], 0, 0, implicit $mode, implicit $exec
72-
; CHECK: dead %27:vgpr_32 = nofpexcept V_MAD_F32_e64 0, %25, 0, [[DEF5]], 0, [[DEF2]], 0, 0, implicit $mode, implicit $exec
73-
; CHECK: dead %28:vgpr_32 = nofpexcept V_MAD_F32_e64 0, %25, 0, [[DEF6]], 0, [[DEF3]], 0, 0, implicit $mode, implicit $exec
74-
; CHECK: GLOBAL_STORE_DWORD [[DEF]], [[DEF10]], 0, 0, implicit $exec
75-
; CHECK: S_ENDPGM 0
25+
; CHECK-NEXT: successors: %bb.1(0x80000000)
26+
; CHECK-NEXT: {{ $}}
27+
; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
28+
; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
29+
; CHECK-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
30+
; CHECK-NEXT: [[DEF3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
31+
; CHECK-NEXT: [[DEF4:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
32+
; CHECK-NEXT: [[DEF5:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
33+
; CHECK-NEXT: [[DEF6:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
34+
; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
35+
; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
36+
; CHECK-NEXT: %9:vgpr_32 = nofpexcept V_MUL_F32_e32 1082130432, [[DEF1]], implicit $mode, implicit $exec
37+
; CHECK-NEXT: [[DEF9:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
38+
; CHECK-NEXT: [[DEF10:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
39+
; CHECK-NEXT: {{ $}}
40+
; CHECK-NEXT: bb.1:
41+
; CHECK-NEXT: successors: %bb.2(0x80000000)
42+
; CHECK-NEXT: {{ $}}
43+
; CHECK-NEXT: DBG_VALUE
44+
; CHECK-NEXT: DBG_VALUE
45+
; CHECK-NEXT: DBG_VALUE
46+
; CHECK-NEXT: {{ $}}
47+
; CHECK-NEXT: bb.2:
48+
; CHECK-NEXT: successors: %bb.3(0x80000000)
49+
; CHECK-NEXT: {{ $}}
50+
; CHECK-NEXT: S_BRANCH %bb.3
51+
; CHECK-NEXT: {{ $}}
52+
; CHECK-NEXT: bb.3:
53+
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
54+
; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
55+
; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
56+
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B32_e32_]]
57+
; CHECK-NEXT: %16:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF7]], [[DEF7]], implicit $mode, implicit $exec
58+
; CHECK-NEXT: %17:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF7]], [[DEF7]], implicit $mode, implicit $exec
59+
; CHECK-NEXT: %18:vgpr_32 = nofpexcept V_MUL_F32_e32 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_]], implicit $mode, implicit $exec
60+
; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
61+
; CHECK-NEXT: [[DEF13:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
62+
; CHECK-NEXT: %21:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_]], implicit $mode, implicit $exec
63+
; CHECK-NEXT: %22:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF7]], [[DEF7]], implicit $mode, implicit $exec
64+
; CHECK-NEXT: dead %23:vgpr_32 = nofpexcept V_MUL_F32_e32 %22, [[DEF13]], implicit $mode, implicit $exec
65+
; CHECK-NEXT: dead [[V_MOV_B32_e32_1]]:vgpr_32 = nofpexcept V_MAC_F32_e32 %21, [[COPY]], [[V_MOV_B32_e32_1]], implicit $mode, implicit $exec
66+
; CHECK-NEXT: [[DEF14:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
67+
; CHECK-NEXT: $sgpr4 = IMPLICIT_DEF
68+
; CHECK-NEXT: $vgpr0 = COPY [[DEF11]]
69+
; CHECK-NEXT: $vgpr0 = COPY [[V_MOV_B32_e32_]]
70+
; CHECK-NEXT: $vgpr1 = COPY [[DEF7]]
71+
; CHECK-NEXT: $vgpr0 = COPY %16
72+
; CHECK-NEXT: $vgpr1 = COPY %17
73+
; CHECK-NEXT: $vgpr2 = COPY %18
74+
; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL [[DEF14]], @foo, csr_amdgpu_highregs, implicit undef $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $sgpr4, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit-def $vgpr0
75+
; CHECK-NEXT: %25:vgpr_32 = nofpexcept V_ADD_F32_e32 %9, [[DEF8]], implicit $mode, implicit $exec
76+
; CHECK-NEXT: %25:vgpr_32 = nofpexcept V_MAC_F32_e32 [[DEF12]], [[DEF9]], %25, implicit $mode, implicit $exec
77+
; CHECK-NEXT: dead %26:vgpr_32 = nofpexcept V_MAD_F32_e64 0, %25, 0, [[DEF4]], 0, [[DEF1]], 0, 0, implicit $mode, implicit $exec
78+
; CHECK-NEXT: dead %27:vgpr_32 = nofpexcept V_MAD_F32_e64 0, %25, 0, [[DEF5]], 0, [[DEF2]], 0, 0, implicit $mode, implicit $exec
79+
; CHECK-NEXT: dead %28:vgpr_32 = nofpexcept V_MAD_F32_e64 0, %25, 0, [[DEF6]], 0, [[DEF3]], 0, 0, implicit $mode, implicit $exec
80+
; CHECK-NEXT: GLOBAL_STORE_DWORD [[DEF]], [[DEF10]], 0, 0, implicit $exec
81+
; CHECK-NEXT: S_ENDPGM 0
7682
bb.0:
7783
successors: %bb.1
7884

‎llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir

Lines changed: 26 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -18,29 +18,32 @@ machineFunctionInfo:
1818
body: |
1919
; CHECK-LABEL: name: multi_def_dead_reg_subreg_check
2020
; CHECK: bb.0:
21-
; CHECK: successors: %bb.1(0x80000000)
22-
; CHECK: liveins: $sgpr6_sgpr7
23-
; CHECK: undef %0.sub3:vreg_512 = V_MOV_B32_e32 0, implicit $exec
24-
; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
25-
; CHECK: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 0, [[V_MOV_B32_e32_]], implicit $exec
26-
; CHECK: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
27-
; CHECK: [[COPY:%[0-9]+]]:vreg_512 = COPY %0
28-
; CHECK: bb.1:
29-
; CHECK: successors: %bb.1(0x80000000)
30-
; CHECK: BUFFER_STORE_DWORD_OFFEN %0.sub3, undef %5:vgpr_32, $sgpr24_sgpr25_sgpr26_sgpr27, $sgpr32, 0, 0, 0, 0, implicit $exec :: (store (s32), align 8, addrspace 5)
31-
; CHECK: dead %6:vgpr_32 = DS_READ_B32_gfx9 undef %7:vgpr_32, 0, 0, implicit $exec
32-
; CHECK: dead %8:vreg_64 = DS_READ_B64_gfx9 [[V_MOV_B32_e32_]], 0, 0, implicit $exec
33-
; CHECK: dead %9:vreg_128 = DS_READ_B128_gfx9 [[V_ADD_U32_e32_]], 0, 0, implicit $exec
34-
; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
35-
; CHECK: undef %11.sub1:vreg_512 = COPY [[COPY]].sub1
36-
; CHECK: INLINEASM &"", 1 /* sideeffect attdialect */, 851978 /* regdef:VGPR_LO16 */, def dead [[COPY1]], 851978 /* regdef:VGPR_LO16 */, def dead [[COPY]].sub1, 2147483657 /* reguse tiedto:$0 */, [[COPY1]], 2147549193 /* reguse tiedto:$1 */, [[COPY]].sub1
37-
; CHECK: %11.sub0:vreg_512 = COPY [[COPY]].sub0
38-
; CHECK: %11.sub3:vreg_512 = COPY [[COPY]].sub3
39-
; CHECK: %11.sub2:vreg_512 = COPY undef [[V_MOV_B32_e32_]]
40-
; CHECK: %11.sub5:vreg_512 = COPY undef [[V_MOV_B32_e32_]]
41-
; CHECK: [[COPY2:%[0-9]+]]:vreg_512 = COPY %11
42-
; CHECK: dead %10:vgpr_32 = V_ADD_CO_U32_e32 4, [[V_MOV_B32_e32_1]], implicit-def dead $vcc, implicit $exec
43-
; CHECK: S_BRANCH %bb.1
21+
; CHECK-NEXT: successors: %bb.1(0x80000000)
22+
; CHECK-NEXT: liveins: $sgpr6_sgpr7
23+
; CHECK-NEXT: {{ $}}
24+
; CHECK-NEXT: undef %0.sub3:vreg_512 = V_MOV_B32_e32 0, implicit $exec
25+
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
26+
; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 0, [[V_MOV_B32_e32_]], implicit $exec
27+
; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
28+
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_512 = COPY %0
29+
; CHECK-NEXT: {{ $}}
30+
; CHECK-NEXT: bb.1:
31+
; CHECK-NEXT: successors: %bb.1(0x80000000)
32+
; CHECK-NEXT: {{ $}}
33+
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFEN %0.sub3, undef %5:vgpr_32, $sgpr24_sgpr25_sgpr26_sgpr27, $sgpr32, 0, 0, 0, 0, implicit $exec :: (store (s32), align 8, addrspace 5)
34+
; CHECK-NEXT: dead %6:vgpr_32 = DS_READ_B32_gfx9 undef %7:vgpr_32, 0, 0, implicit $exec
35+
; CHECK-NEXT: dead %8:vreg_64 = DS_READ_B64_gfx9 [[V_MOV_B32_e32_]], 0, 0, implicit $exec
36+
; CHECK-NEXT: dead %9:vreg_128 = DS_READ_B128_gfx9 [[V_ADD_U32_e32_]], 0, 0, implicit $exec
37+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
38+
; CHECK-NEXT: undef %11.sub1:vreg_512 = COPY [[COPY]].sub1
39+
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 851978 /* regdef:VGPR_LO16 */, def dead [[COPY1]], 851978 /* regdef:VGPR_LO16 */, def dead [[COPY]].sub1, 2147483657 /* reguse tiedto:$0 */, [[COPY1]], 2147549193 /* reguse tiedto:$1 */, [[COPY]].sub1
40+
; CHECK-NEXT: %11.sub0:vreg_512 = COPY [[COPY]].sub0
41+
; CHECK-NEXT: %11.sub3:vreg_512 = COPY [[COPY]].sub3
42+
; CHECK-NEXT: %11.sub2:vreg_512 = COPY undef [[V_MOV_B32_e32_]]
43+
; CHECK-NEXT: %11.sub5:vreg_512 = COPY undef [[V_MOV_B32_e32_]]
44+
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vreg_512 = COPY %11
45+
; CHECK-NEXT: dead %10:vgpr_32 = V_ADD_CO_U32_e32 4, [[V_MOV_B32_e32_1]], implicit-def dead $vcc, implicit $exec
46+
; CHECK-NEXT: S_BRANCH %bb.1
4447
bb.0:
4548
liveins: $sgpr6_sgpr7
4649

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