|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs |
| 2 | +; RUN: opt -S -verify -iroutliner -ir-outlining-no-cost < %s | FileCheck %s |
| 3 | + |
| 4 | +; Make sure that when we merge phi nodes, we do not merge two different PHINodes |
| 5 | +; as the same phi node. |
| 6 | + |
| 7 | +define void @f1() { |
| 8 | +bb1: |
| 9 | + %0 = add i32 1, 2 |
| 10 | + %1 = add i32 3, 4 |
| 11 | + %2 = add i32 5, 6 |
| 12 | + %3 = add i32 7, 8 |
| 13 | + br label %bb5 |
| 14 | +bb2: |
| 15 | + %4 = mul i32 5, 4 |
| 16 | + br label %bb5 |
| 17 | + |
| 18 | +placeholder: |
| 19 | + %a = sub i32 5, 4 |
| 20 | + ret void |
| 21 | + |
| 22 | +bb5: |
| 23 | + %phinode = phi i32 [5, %bb1], [5, %bb2] |
| 24 | + %phinode1 = phi i32 [5, %bb1], [5, %bb2] |
| 25 | + ret void |
| 26 | +} |
| 27 | + |
| 28 | +define void @f2() { |
| 29 | +bb1: |
| 30 | + %0 = add i32 1, 2 |
| 31 | + %1 = add i32 3, 4 |
| 32 | + %2 = add i32 5, 6 |
| 33 | + %3 = add i32 7, 8 |
| 34 | + br label %bb5 |
| 35 | +bb2: |
| 36 | + %4 = mul i32 5, 4 |
| 37 | + br label %bb5 |
| 38 | + |
| 39 | +placeholder: |
| 40 | + %a = sub i32 5, 4 |
| 41 | + ret void |
| 42 | + |
| 43 | +bb5: |
| 44 | + %phinode = phi i32 [5, %bb1], [5, %bb2] |
| 45 | + %phinode1 = phi i32 [5, %bb1], [5, %bb2] |
| 46 | + ret void |
| 47 | +} |
| 48 | +; CHECK-LABEL: @f1( |
| 49 | +; CHECK-NEXT: bb1: |
| 50 | +; CHECK-NEXT: [[PHINODE1_CE_LOC:%.*]] = alloca i32, align 4 |
| 51 | +; CHECK-NEXT: [[PHINODE_CE_LOC:%.*]] = alloca i32, align 4 |
| 52 | +; CHECK-NEXT: [[LT_CAST:%.*]] = bitcast i32* [[PHINODE_CE_LOC]] to i8* |
| 53 | +; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 -1, i8* [[LT_CAST]]) |
| 54 | +; CHECK-NEXT: [[LT_CAST1:%.*]] = bitcast i32* [[PHINODE1_CE_LOC]] to i8* |
| 55 | +; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 -1, i8* [[LT_CAST1]]) |
| 56 | +; CHECK-NEXT: [[TARGETBLOCK:%.*]] = call i1 @outlined_ir_func_0(i32* [[PHINODE_CE_LOC]], i32* [[PHINODE1_CE_LOC]]) |
| 57 | +; CHECK-NEXT: [[PHINODE_CE_RELOAD:%.*]] = load i32, i32* [[PHINODE_CE_LOC]], align 4 |
| 58 | +; CHECK-NEXT: [[PHINODE1_CE_RELOAD:%.*]] = load i32, i32* [[PHINODE1_CE_LOC]], align 4 |
| 59 | +; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 -1, i8* [[LT_CAST]]) |
| 60 | +; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 -1, i8* [[LT_CAST1]]) |
| 61 | +; CHECK-NEXT: br i1 [[TARGETBLOCK]], label [[BB5:%.*]], label [[BB1_AFTER_OUTLINE:%.*]] |
| 62 | +; CHECK: bb1_after_outline: |
| 63 | +; CHECK-NEXT: ret void |
| 64 | +; CHECK: bb5: |
| 65 | +; CHECK-NEXT: [[PHINODE:%.*]] = phi i32 [ [[PHINODE_CE_RELOAD]], [[BB1:%.*]] ] |
| 66 | +; CHECK-NEXT: [[PHINODE1:%.*]] = phi i32 [ [[PHINODE1_CE_RELOAD]], [[BB1]] ] |
| 67 | +; CHECK-NEXT: ret void |
| 68 | +; |
| 69 | +; |
| 70 | +; CHECK-LABEL: @f2( |
| 71 | +; CHECK-NEXT: bb1: |
| 72 | +; CHECK-NEXT: [[PHINODE1_CE_LOC:%.*]] = alloca i32, align 4 |
| 73 | +; CHECK-NEXT: [[PHINODE_CE_LOC:%.*]] = alloca i32, align 4 |
| 74 | +; CHECK-NEXT: [[LT_CAST:%.*]] = bitcast i32* [[PHINODE_CE_LOC]] to i8* |
| 75 | +; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 -1, i8* [[LT_CAST]]) |
| 76 | +; CHECK-NEXT: [[LT_CAST1:%.*]] = bitcast i32* [[PHINODE1_CE_LOC]] to i8* |
| 77 | +; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 -1, i8* [[LT_CAST1]]) |
| 78 | +; CHECK-NEXT: [[TARGETBLOCK:%.*]] = call i1 @outlined_ir_func_0(i32* [[PHINODE_CE_LOC]], i32* [[PHINODE1_CE_LOC]]) |
| 79 | +; CHECK-NEXT: [[PHINODE_CE_RELOAD:%.*]] = load i32, i32* [[PHINODE_CE_LOC]], align 4 |
| 80 | +; CHECK-NEXT: [[PHINODE1_CE_RELOAD:%.*]] = load i32, i32* [[PHINODE1_CE_LOC]], align 4 |
| 81 | +; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 -1, i8* [[LT_CAST]]) |
| 82 | +; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 -1, i8* [[LT_CAST1]]) |
| 83 | +; CHECK-NEXT: br i1 [[TARGETBLOCK]], label [[BB5:%.*]], label [[BB1_AFTER_OUTLINE:%.*]] |
| 84 | +; CHECK: bb1_after_outline: |
| 85 | +; CHECK-NEXT: ret void |
| 86 | +; CHECK: bb5: |
| 87 | +; CHECK-NEXT: [[PHINODE:%.*]] = phi i32 [ [[PHINODE_CE_RELOAD]], [[BB1:%.*]] ] |
| 88 | +; CHECK-NEXT: [[PHINODE1:%.*]] = phi i32 [ [[PHINODE1_CE_RELOAD]], [[BB1]] ] |
| 89 | +; CHECK-NEXT: ret void |
| 90 | +; |
| 91 | +; |
| 92 | +; CHECK-LABEL: define internal i1 @outlined_ir_func_0( |
| 93 | +; CHECK-NEXT: newFuncRoot: |
| 94 | +; CHECK-NEXT: br label [[BB1_TO_OUTLINE:%.*]] |
| 95 | +; CHECK: bb1_to_outline: |
| 96 | +; CHECK-NEXT: [[TMP2:%.*]] = add i32 1, 2 |
| 97 | +; CHECK-NEXT: [[TMP3:%.*]] = add i32 3, 4 |
| 98 | +; CHECK-NEXT: [[TMP4:%.*]] = add i32 5, 6 |
| 99 | +; CHECK-NEXT: [[TMP5:%.*]] = add i32 7, 8 |
| 100 | +; CHECK-NEXT: br label [[BB5_SPLIT:%.*]] |
| 101 | +; CHECK: bb2: |
| 102 | +; CHECK-NEXT: [[TMP6:%.*]] = mul i32 5, 4 |
| 103 | +; CHECK-NEXT: br label [[BB5_SPLIT]] |
| 104 | +; CHECK: placeholder: |
| 105 | +; CHECK-NEXT: [[A:%.*]] = sub i32 5, 4 |
| 106 | +; CHECK-NEXT: br label [[BB1_AFTER_OUTLINE_EXITSTUB:%.*]] |
| 107 | +; CHECK: bb5.split: |
| 108 | +; CHECK-NEXT: [[PHINODE_CE:%.*]] = phi i32 [ 5, [[BB1_TO_OUTLINE]] ], [ 5, [[BB2:%.*]] ] |
| 109 | +; CHECK-NEXT: [[PHINODE1_CE:%.*]] = phi i32 [ 5, [[BB1_TO_OUTLINE]] ], [ 5, [[BB2]] ] |
| 110 | +; CHECK-NEXT: br label [[BB5_EXITSTUB:%.*]] |
| 111 | +; CHECK: bb5.exitStub: |
| 112 | +; CHECK-NEXT: store i32 [[PHINODE_CE]], i32* [[TMP0:%.*]], align 4 |
| 113 | +; CHECK-NEXT: store i32 [[PHINODE1_CE]], i32* [[TMP1:%.*]], align 4 |
| 114 | +; CHECK-NEXT: ret i1 true |
| 115 | +; CHECK: bb1_after_outline.exitStub: |
| 116 | +; CHECK-NEXT: ret i1 false |
| 117 | +; |
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