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[ORC][ORC-RT] Enable the MachO platform for arm64
Enables the arm64 MachO platform, adds basic tests, and implements the missing TLV relocations and runtime wrapper function. The TLV relocations are just handled as GOT accesses. rdar://84671534 Differential Revision: https://reviews.llvm.org/D112656
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‎compiler-rt/lib/orc/CMakeLists.txt

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@ set(ORC_SOURCES
1212
# Implementation files for all ORC architectures.
1313
set(ALL_ORC_ASM_SOURCES
1414
macho_tlv.x86-64.S
15+
macho_tlv.arm64.S
1516
elfnix_tls.x86-64.S
1617
)
1718

@@ -60,7 +61,10 @@ if (TARGET cxx-headers OR HAVE_LIBCXX)
6061
endif()
6162

6263
if (APPLE)
63-
add_asm_sources(ORC_ASM_SOURCES macho_tlv.x86-64.S)
64+
add_asm_sources(ORC_ASM_SOURCES
65+
macho_tlv.x86-64.S
66+
macho_tlv.arm64.S
67+
)
6468

6569
add_compiler_rt_object_libraries(RTOrc
6670
OS ${ORC_SUPPORTED_OS}

‎compiler-rt/lib/orc/macho_tlv.arm64.S

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//===-- macho_tlv.arm64.s ---------------------------------------*- ASM -*-===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
//
9+
// This file is a part of the ORC runtime support library.
10+
//
11+
//===----------------------------------------------------------------------===//
12+
13+
// The content of this file is arm64-only
14+
#if defined(__arm64__) || defined(__aarch64__)
15+
16+
#define REGISTER_SAVE_SPACE_SIZE 32 * 24
17+
18+
.text
19+
20+
// returns address of TLV in x0, all other registers preserved
21+
.globl ___orc_rt_macho_tlv_get_addr
22+
___orc_rt_macho_tlv_get_addr:
23+
sub sp, sp, #REGISTER_SAVE_SPACE_SIZE
24+
stp x29, x30, [sp, #16 * 1]
25+
stp x27, x28, [sp, #16 * 2]
26+
stp x25, x26, [sp, #16 * 3]
27+
stp x23, x24, [sp, #16 * 4]
28+
stp x21, x22, [sp, #16 * 5]
29+
stp x19, x20, [sp, #16 * 6]
30+
stp x17, x18, [sp, #16 * 7]
31+
stp x15, x16, [sp, #16 * 8]
32+
stp x13, x14, [sp, #16 * 9]
33+
stp x11, x12, [sp, #16 * 10]
34+
stp x9, x10, [sp, #16 * 11]
35+
stp x7, x8, [sp, #16 * 12]
36+
stp x5, x6, [sp, #16 * 13]
37+
stp x3, x4, [sp, #16 * 14]
38+
stp x1, x2, [sp, #16 * 15]
39+
stp q30, q31, [sp, #32 * 8]
40+
stp q28, q29, [sp, #32 * 9]
41+
stp q26, q27, [sp, #32 * 10]
42+
stp q24, q25, [sp, #32 * 11]
43+
stp q22, q23, [sp, #32 * 12]
44+
stp q20, q21, [sp, #32 * 13]
45+
stp q18, q19, [sp, #32 * 14]
46+
stp q16, q17, [sp, #32 * 15]
47+
stp q14, q15, [sp, #32 * 16]
48+
stp q12, q13, [sp, #32 * 17]
49+
stp q10, q11, [sp, #32 * 18]
50+
stp q8, q9, [sp, #32 * 19]
51+
stp q6, q7, [sp, #32 * 20]
52+
stp q4, q5, [sp, #32 * 21]
53+
stp q2, q3, [sp, #32 * 22]
54+
stp q0, q1, [sp, #32 * 23]
55+
56+
bl ___orc_rt_macho_tlv_get_addr_impl
57+
58+
ldp q0, q1, [sp, #32 * 23]
59+
ldp q2, q3, [sp, #32 * 22]
60+
ldp q4, q5, [sp, #32 * 21]
61+
ldp q6, q7, [sp, #32 * 20]
62+
ldp q8, q9, [sp, #32 * 19]
63+
ldp q10, q11, [sp, #32 * 18]
64+
ldp q12, q13, [sp, #32 * 17]
65+
ldp q14, q15, [sp, #32 * 16]
66+
ldp q16, q17, [sp, #32 * 15]
67+
ldp q18, q19, [sp, #32 * 14]
68+
ldp q20, q21, [sp, #32 * 13]
69+
ldp q22, q23, [sp, #32 * 12]
70+
ldp q24, q25, [sp, #32 * 11]
71+
ldp q26, q27, [sp, #32 * 10]
72+
ldp q28, q29, [sp, #32 * 9]
73+
ldp q30, q31, [sp, #32 * 8]
74+
ldp x1, x2, [sp, #16 * 15]
75+
ldp x3, x4, [sp, #16 * 14]
76+
ldp x5, x6, [sp, #16 * 13]
77+
ldp x7, x8, [sp, #16 * 12]
78+
ldp x9, x10, [sp, #16 * 11]
79+
ldp x11, x12, [sp, #16 * 10]
80+
ldp x13, x14, [sp, #16 * 9]
81+
ldp x15, x16, [sp, #16 * 8]
82+
ldp x17, x18, [sp, #16 * 7]
83+
ldp x19, x20, [sp, #16 * 6]
84+
ldp x21, x22, [sp, #16 * 5]
85+
ldp x23, x24, [sp, #16 * 4]
86+
ldp x25, x26, [sp, #16 * 3]
87+
ldp x27, x28, [sp, #16 * 2]
88+
ldp x29, x30, [sp, #16 * 1]
89+
add sp, sp, #REGISTER_SAVE_SPACE_SIZE
90+
ret
91+
92+
#endif // defined(__arm64__) || defined(__aarch64__)

‎compiler-rt/test/orc/TestCases/Darwin/arm64/lit.local.cfg.py

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if config.root.host_arch not in ['aarch64', 'arm64']:
2+
config.unsupported = True
3+
4+
if config.target_arch not in ['aarch64', 'arm64']:
5+
config.unsupported = True

‎compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-cxa-atexit.S

Lines changed: 87 additions & 0 deletions
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// Test that the runtime correctly interposes ___cxa_atexit.
2+
//
3+
// RUN: %clang -c -o %t %s
4+
// RUN: %llvm_jitlink %t
5+
6+
.section __TEXT,__text,regular,pure_instructions
7+
.build_version macos, 12, 0 sdk_version 12, 0
8+
9+
# main registers the atexit and sets the test result to one.
10+
.globl _main ; -- Begin function main
11+
.p2align 2
12+
_main: ; @main
13+
; %bb.0:
14+
sub sp, sp, #32 ; =32
15+
stp x29, x30, [sp, #16] ; 16-byte Folded Spill
16+
add x29, sp, #16 ; =16
17+
stur wzr, [x29, #-4]
18+
adrp x8, __ZGVZ4mainE6onExit@PAGE
19+
add x8, x8, __ZGVZ4mainE6onExit@PAGEOFF
20+
ldarb w8, [x8]
21+
and w8, w8, #0x1
22+
and w8, w8, #0xff
23+
cbnz w8, LBB0_3
24+
; %bb.1:
25+
adrp x0, __ZGVZ4mainE6onExit@PAGE
26+
add x0, x0, __ZGVZ4mainE6onExit@PAGEOFF
27+
bl ___cxa_guard_acquire
28+
cbz w0, LBB0_3
29+
; %bb.2:
30+
adrp x0, __ZN6OnExitD1Ev@GOTPAGE
31+
ldr x0, [x0, __ZN6OnExitD1Ev@GOTPAGEOFF]
32+
adrp x1, __ZZ4mainE6onExit@PAGE
33+
add x1, x1, __ZZ4mainE6onExit@PAGEOFF
34+
adrp x2, ___dso_handle@PAGE
35+
add x2, x2, ___dso_handle@PAGEOFF
36+
bl ___cxa_atexit
37+
adrp x0, __ZGVZ4mainE6onExit@PAGE
38+
add x0, x0, __ZGVZ4mainE6onExit@PAGEOFF
39+
bl ___cxa_guard_release
40+
LBB0_3:
41+
mov x0, #1
42+
bl _llvm_jitlink_setTestResultOverride
43+
mov w0, #0
44+
ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
45+
add sp, sp, #32 ; =32
46+
ret
47+
; -- End function
48+
49+
# OnExit destructor resets the test result override to zero.
50+
.globl __ZN6OnExitD1Ev ; -- Begin function _ZN6OnExitD1Ev
51+
.weak_def_can_be_hidden __ZN6OnExitD1Ev
52+
.p2align 2
53+
__ZN6OnExitD1Ev: ; @_ZN6OnExitD1Ev
54+
; %bb.0:
55+
sub sp, sp, #32 ; =32
56+
stp x29, x30, [sp, #16] ; 16-byte Folded Spill
57+
add x29, sp, #16 ; =16
58+
str x0, [sp, #8]
59+
ldr x0, [sp, #8]
60+
str x0, [sp] ; 8-byte Folded Spill
61+
bl __ZN6OnExitD2Ev
62+
ldr x0, [sp] ; 8-byte Folded Reload
63+
ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
64+
add sp, sp, #32 ; =32
65+
ret
66+
; -- End function
67+
.globl __ZN6OnExitD2Ev ; -- Begin function _ZN6OnExitD2Ev
68+
.weak_def_can_be_hidden __ZN6OnExitD2Ev
69+
.p2align 2
70+
__ZN6OnExitD2Ev: ; @_ZN6OnExitD2Ev
71+
; %bb.0:
72+
sub sp, sp, #32 ; =32
73+
stp x29, x30, [sp, #16] ; 16-byte Folded Spill
74+
add x29, sp, #16 ; =16
75+
str x0, [sp, #8]
76+
ldr x8, [sp, #8]
77+
str x8, [sp] ; 8-byte Folded Spill
78+
mov x0, #0
79+
bl _llvm_jitlink_setTestResultOverride
80+
ldr x0, [sp] ; 8-byte Folded Reload
81+
ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
82+
add sp, sp, #32 ; =32
83+
ret
84+
; -- End function
85+
.zerofill __DATA,__bss,__ZZ4mainE6onExit,1,0 ; @_ZZ4mainE6onExit
86+
.zerofill __DATA,__bss,__ZGVZ4mainE6onExit,8,3 ; @_ZGVZ4mainE6onExit
87+
.subsections_via_symbols

‎compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-objc-methods.S

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1+
// RUN: %clang -c -o %t %s
2+
// RUN: %llvm_jitlink -dlopen libobjc.A.dylib %t
3+
//
4+
// Test that Objective-C class and instance methods work.
5+
6+
.section __TEXT,__text,regular,pure_instructions
7+
.build_version macos, 12, 0 sdk_version 12, 0
8+
.p2align 2 ; -- Begin function +[ZeroGen classZero]
9+
"+[ZeroGen classZero]": ; @"\01+[ZeroGen classZero]"
10+
.cfi_startproc
11+
; %bb.0:
12+
sub sp, sp, #16 ; =16
13+
.cfi_def_cfa_offset 16
14+
str x0, [sp, #8]
15+
str x1, [sp]
16+
mov w0, #0
17+
add sp, sp, #16 ; =16
18+
ret
19+
.cfi_endproc
20+
; -- End function
21+
.p2align 2 ; -- Begin function -[ZeroGen objZero]
22+
"-[ZeroGen objZero]": ; @"\01-[ZeroGen objZero]"
23+
.cfi_startproc
24+
; %bb.0:
25+
sub sp, sp, #16 ; =16
26+
.cfi_def_cfa_offset 16
27+
str x0, [sp, #8]
28+
str x1, [sp]
29+
mov w0, #0
30+
add sp, sp, #16 ; =16
31+
ret
32+
.cfi_endproc
33+
; -- End function
34+
.globl _main ; -- Begin function main
35+
.p2align 2
36+
_main: ; @main
37+
.cfi_startproc
38+
; %bb.0:
39+
sub sp, sp, #48 ; =48
40+
stp x29, x30, [sp, #32] ; 16-byte Folded Spill
41+
add x29, sp, #32 ; =32
42+
.cfi_def_cfa w29, 16
43+
.cfi_offset w30, -8
44+
.cfi_offset w29, -16
45+
stur wzr, [x29, #-4]
46+
adrp x8, _OBJC_CLASSLIST_REFERENCES_$_@PAGE
47+
str x8, [sp, #8] ; 8-byte Folded Spill
48+
ldr x0, [x8, _OBJC_CLASSLIST_REFERENCES_$_@PAGEOFF]
49+
bl _objc_alloc_init
50+
ldr x8, [sp, #8] ; 8-byte Folded Reload
51+
str x0, [sp, #16]
52+
ldr x0, [x8, _OBJC_CLASSLIST_REFERENCES_$_@PAGEOFF]
53+
adrp x8, _OBJC_SELECTOR_REFERENCES_@PAGE
54+
ldr x1, [x8, _OBJC_SELECTOR_REFERENCES_@PAGEOFF]
55+
bl _objc_msgSend
56+
cbz w0, LBB2_2
57+
; %bb.1:
58+
mov w8, #1
59+
stur w8, [x29, #-4]
60+
b LBB2_5
61+
LBB2_2:
62+
ldr x0, [sp, #16]
63+
adrp x8, _OBJC_SELECTOR_REFERENCES_.2@PAGE
64+
ldr x1, [x8, _OBJC_SELECTOR_REFERENCES_.2@PAGEOFF]
65+
bl _objc_msgSend
66+
cbz w0, LBB2_4
67+
; %bb.3:
68+
mov w8, #1
69+
stur w8, [x29, #-4]
70+
b LBB2_5
71+
LBB2_4:
72+
stur wzr, [x29, #-4]
73+
LBB2_5:
74+
ldur w0, [x29, #-4]
75+
ldp x29, x30, [sp, #32] ; 16-byte Folded Reload
76+
add sp, sp, #48 ; =48
77+
ret
78+
.cfi_endproc
79+
; -- End function
80+
.section __TEXT,__objc_classname,cstring_literals
81+
l_OBJC_CLASS_NAME_: ; @OBJC_CLASS_NAME_
82+
.asciz "ZeroGen"
83+
84+
.section __TEXT,__objc_methname,cstring_literals
85+
l_OBJC_METH_VAR_NAME_: ; @OBJC_METH_VAR_NAME_
86+
.asciz "classZero"
87+
88+
.section __TEXT,__objc_methtype,cstring_literals
89+
l_OBJC_METH_VAR_TYPE_: ; @OBJC_METH_VAR_TYPE_
90+
.asciz "i16@0:8"
91+
92+
.section __DATA,__objc_const
93+
.p2align 3 ; @"_OBJC_$_CLASS_METHODS_ZeroGen"
94+
__OBJC_$_CLASS_METHODS_ZeroGen:
95+
.long 24 ; 0x18
96+
.long 1 ; 0x1
97+
.quad l_OBJC_METH_VAR_NAME_
98+
.quad l_OBJC_METH_VAR_TYPE_
99+
.quad "+[ZeroGen classZero]"
100+
101+
.p2align 3 ; @"_OBJC_METACLASS_RO_$_ZeroGen"
102+
__OBJC_METACLASS_RO_$_ZeroGen:
103+
.long 1 ; 0x1
104+
.long 40 ; 0x28
105+
.long 40 ; 0x28
106+
.space 4
107+
.quad 0
108+
.quad l_OBJC_CLASS_NAME_
109+
.quad __OBJC_$_CLASS_METHODS_ZeroGen
110+
.quad 0
111+
.quad 0
112+
.quad 0
113+
.quad 0
114+
115+
.section __DATA,__objc_data
116+
.globl _OBJC_METACLASS_$_ZeroGen ; @"OBJC_METACLASS_$_ZeroGen"
117+
.p2align 3
118+
_OBJC_METACLASS_$_ZeroGen:
119+
.quad _OBJC_METACLASS_$_NSObject
120+
.quad _OBJC_METACLASS_$_NSObject
121+
.quad __objc_empty_cache
122+
.quad 0
123+
.quad __OBJC_METACLASS_RO_$_ZeroGen
124+
125+
.section __TEXT,__objc_methname,cstring_literals
126+
l_OBJC_METH_VAR_NAME_.1: ; @OBJC_METH_VAR_NAME_.1
127+
.asciz "objZero"
128+
129+
.section __DATA,__objc_const
130+
.p2align 3 ; @"_OBJC_$_INSTANCE_METHODS_ZeroGen"
131+
__OBJC_$_INSTANCE_METHODS_ZeroGen:
132+
.long 24 ; 0x18
133+
.long 1 ; 0x1
134+
.quad l_OBJC_METH_VAR_NAME_.1
135+
.quad l_OBJC_METH_VAR_TYPE_
136+
.quad "-[ZeroGen objZero]"
137+
138+
.p2align 3 ; @"_OBJC_CLASS_RO_$_ZeroGen"
139+
__OBJC_CLASS_RO_$_ZeroGen:
140+
.long 0 ; 0x0
141+
.long 8 ; 0x8
142+
.long 8 ; 0x8
143+
.space 4
144+
.quad 0
145+
.quad l_OBJC_CLASS_NAME_
146+
.quad __OBJC_$_INSTANCE_METHODS_ZeroGen
147+
.quad 0
148+
.quad 0
149+
.quad 0
150+
.quad 0
151+
152+
.section __DATA,__objc_data
153+
.globl _OBJC_CLASS_$_ZeroGen ; @"OBJC_CLASS_$_ZeroGen"
154+
.p2align 3
155+
_OBJC_CLASS_$_ZeroGen:
156+
.quad _OBJC_METACLASS_$_ZeroGen
157+
.quad _OBJC_CLASS_$_NSObject
158+
.quad __objc_empty_cache
159+
.quad 0
160+
.quad __OBJC_CLASS_RO_$_ZeroGen
161+
162+
.section __DATA,__objc_classrefs,regular,no_dead_strip
163+
.p2align 3 ; @"OBJC_CLASSLIST_REFERENCES_$_"
164+
_OBJC_CLASSLIST_REFERENCES_$_:
165+
.quad _OBJC_CLASS_$_ZeroGen
166+
167+
.section __DATA,__objc_selrefs,literal_pointers,no_dead_strip
168+
.p2align 3 ; @OBJC_SELECTOR_REFERENCES_
169+
_OBJC_SELECTOR_REFERENCES_:
170+
.quad l_OBJC_METH_VAR_NAME_
171+
172+
.p2align 3 ; @OBJC_SELECTOR_REFERENCES_.2
173+
_OBJC_SELECTOR_REFERENCES_.2:
174+
.quad l_OBJC_METH_VAR_NAME_.1
175+
176+
.section __DATA,__objc_classlist,regular,no_dead_strip
177+
.p2align 3 ; @"OBJC_LABEL_CLASS_$"
178+
l_OBJC_LABEL_CLASS_$:
179+
.quad _OBJC_CLASS_$_ZeroGen
180+
181+
.section __DATA,__objc_imageinfo,regular,no_dead_strip
182+
L_OBJC_IMAGE_INFO:
183+
.long 0
184+
.long 64
185+
186+
.subsections_via_symbols

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