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[X86] Add ueq/one fp128 quiet compare tests. NFC
The ONE expansion calls OGT/OLT libcalls which will signal for QNAN. The UEQ expansion uses unord and eq libcalls which won't signal. We should probably use those libcalls for ONE with appropriate logic. Quiet OGT/OLT/OLE/OGE have similar issue, but not sure how to fix those yet.
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‎llvm/test/CodeGen/X86/fp128-compare.ll

Lines changed: 64 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -121,6 +121,68 @@ entry:
121121
ret i32 %conv
122122
}
123123

124+
define i32 @TestComp128UEQ(fp128 %d1, fp128 %d2) {
125+
; CHECK-LABEL: TestComp128UEQ:
126+
; CHECK: # %bb.0: # %entry
127+
; CHECK-NEXT: pushq %rbx
128+
; CHECK-NEXT: .cfi_def_cfa_offset 16
129+
; CHECK-NEXT: subq $32, %rsp
130+
; CHECK-NEXT: .cfi_def_cfa_offset 48
131+
; CHECK-NEXT: .cfi_offset %rbx, -16
132+
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
133+
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
134+
; CHECK-NEXT: callq __eqtf2
135+
; CHECK-NEXT: testl %eax, %eax
136+
; CHECK-NEXT: sete %bl
137+
; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
138+
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
139+
; CHECK-NEXT: callq __unordtf2
140+
; CHECK-NEXT: testl %eax, %eax
141+
; CHECK-NEXT: setne %al
142+
; CHECK-NEXT: orb %bl, %al
143+
; CHECK-NEXT: movzbl %al, %eax
144+
; CHECK-NEXT: addq $32, %rsp
145+
; CHECK-NEXT: .cfi_def_cfa_offset 16
146+
; CHECK-NEXT: popq %rbx
147+
; CHECK-NEXT: .cfi_def_cfa_offset 8
148+
; CHECK-NEXT: retq
149+
entry:
150+
%cmp = fcmp ueq fp128 %d1, %d2
151+
%conv = zext i1 %cmp to i32
152+
ret i32 %conv
153+
}
154+
155+
define i32 @TestComp128ONE(fp128 %d1, fp128 %d2) {
156+
; CHECK-LABEL: TestComp128ONE:
157+
; CHECK: # %bb.0: # %entry
158+
; CHECK-NEXT: pushq %rbx
159+
; CHECK-NEXT: .cfi_def_cfa_offset 16
160+
; CHECK-NEXT: subq $32, %rsp
161+
; CHECK-NEXT: .cfi_def_cfa_offset 48
162+
; CHECK-NEXT: .cfi_offset %rbx, -16
163+
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
164+
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
165+
; CHECK-NEXT: callq __gttf2
166+
; CHECK-NEXT: testl %eax, %eax
167+
; CHECK-NEXT: setg %bl
168+
; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
169+
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
170+
; CHECK-NEXT: callq __lttf2
171+
; CHECK-NEXT: testl %eax, %eax
172+
; CHECK-NEXT: sets %al
173+
; CHECK-NEXT: orb %bl, %al
174+
; CHECK-NEXT: movzbl %al, %eax
175+
; CHECK-NEXT: addq $32, %rsp
176+
; CHECK-NEXT: .cfi_def_cfa_offset 16
177+
; CHECK-NEXT: popq %rbx
178+
; CHECK-NEXT: .cfi_def_cfa_offset 8
179+
; CHECK-NEXT: retq
180+
entry:
181+
%cmp = fcmp one fp128 %d1, %d2
182+
%conv = zext i1 %cmp to i32
183+
ret i32 %conv
184+
}
185+
124186
define fp128 @TestMax(fp128 %x, fp128 %y) {
125187
; CHECK-LABEL: TestMax:
126188
; CHECK: # %bb.0: # %entry
@@ -131,10 +193,10 @@ define fp128 @TestMax(fp128 %x, fp128 %y) {
131193
; CHECK-NEXT: callq __gttf2
132194
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
133195
; CHECK-NEXT: testl %eax, %eax
134-
; CHECK-NEXT: jg .LBB6_2
196+
; CHECK-NEXT: jg .LBB8_2
135197
; CHECK-NEXT: # %bb.1: # %entry
136198
; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
137-
; CHECK-NEXT: .LBB6_2: # %entry
199+
; CHECK-NEXT: .LBB8_2: # %entry
138200
; CHECK-NEXT: addq $40, %rsp
139201
; CHECK-NEXT: .cfi_def_cfa_offset 8
140202
; CHECK-NEXT: retq

‎llvm/test/CodeGen/X86/fp128-libcalls-strict.ll

Lines changed: 166 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1220,6 +1220,172 @@ define i64 @cmps(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
12201220
ret i64 %res
12211221
}
12221222

1223+
define i64 @cmp_ueq_q(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
1224+
; CHECK-LABEL: cmp_ueq_q:
1225+
; CHECK: # %bb.0:
1226+
; CHECK-NEXT: pushq %rbp
1227+
; CHECK-NEXT: pushq %r14
1228+
; CHECK-NEXT: pushq %rbx
1229+
; CHECK-NEXT: subq $32, %rsp
1230+
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1231+
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1232+
; CHECK-NEXT: movq %rsi, %r14
1233+
; CHECK-NEXT: movq %rdi, %rbx
1234+
; CHECK-NEXT: callq __eqtf2
1235+
; CHECK-NEXT: testl %eax, %eax
1236+
; CHECK-NEXT: sete %bpl
1237+
; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
1238+
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
1239+
; CHECK-NEXT: callq __unordtf2
1240+
; CHECK-NEXT: testl %eax, %eax
1241+
; CHECK-NEXT: setne %al
1242+
; CHECK-NEXT: orb %bpl, %al
1243+
; CHECK-NEXT: cmoveq %r14, %rbx
1244+
; CHECK-NEXT: movq %rbx, %rax
1245+
; CHECK-NEXT: addq $32, %rsp
1246+
; CHECK-NEXT: popq %rbx
1247+
; CHECK-NEXT: popq %r14
1248+
; CHECK-NEXT: popq %rbp
1249+
; CHECK-NEXT: retq
1250+
;
1251+
; X86-LABEL: cmp_ueq_q:
1252+
; X86: # %bb.0:
1253+
; X86-NEXT: pushl %ebp
1254+
; X86-NEXT: pushl %ebx
1255+
; X86-NEXT: pushl %edi
1256+
; X86-NEXT: pushl %esi
1257+
; X86-NEXT: subl $12, %esp
1258+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
1259+
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
1260+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
1261+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1262+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1263+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1264+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1265+
; X86-NEXT: pushl %ebx
1266+
; X86-NEXT: movl %ebx, %esi
1267+
; X86-NEXT: pushl %edi
1268+
; X86-NEXT: pushl %ebp
1269+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1270+
; X86-NEXT: calll __eqtf2
1271+
; X86-NEXT: addl $32, %esp
1272+
; X86-NEXT: testl %eax, %eax
1273+
; X86-NEXT: sete %bl
1274+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1275+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1276+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1277+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1278+
; X86-NEXT: pushl %esi
1279+
; X86-NEXT: pushl %edi
1280+
; X86-NEXT: pushl %ebp
1281+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1282+
; X86-NEXT: calll __unordtf2
1283+
; X86-NEXT: addl $32, %esp
1284+
; X86-NEXT: testl %eax, %eax
1285+
; X86-NEXT: setne %al
1286+
; X86-NEXT: orb %bl, %al
1287+
; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
1288+
; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx
1289+
; X86-NEXT: cmovnel %eax, %ecx
1290+
; X86-NEXT: movl (%ecx), %eax
1291+
; X86-NEXT: movl 4(%ecx), %edx
1292+
; X86-NEXT: addl $12, %esp
1293+
; X86-NEXT: popl %esi
1294+
; X86-NEXT: popl %edi
1295+
; X86-NEXT: popl %ebx
1296+
; X86-NEXT: popl %ebp
1297+
; X86-NEXT: retl
1298+
%cond = call i1 @llvm.experimental.constrained.fcmp.f128(
1299+
fp128 %x, fp128 %y,
1300+
metadata !"ueq",
1301+
metadata !"fpexcept.strict") #0
1302+
%res = select i1 %cond, i64 %a, i64 %b
1303+
ret i64 %res
1304+
}
1305+
1306+
define i64 @cmp_one_q(i64 %a, i64 %b, fp128 %x, fp128 %y) #0 {
1307+
; CHECK-LABEL: cmp_one_q:
1308+
; CHECK: # %bb.0:
1309+
; CHECK-NEXT: pushq %rbp
1310+
; CHECK-NEXT: pushq %r14
1311+
; CHECK-NEXT: pushq %rbx
1312+
; CHECK-NEXT: subq $32, %rsp
1313+
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1314+
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
1315+
; CHECK-NEXT: movq %rsi, %r14
1316+
; CHECK-NEXT: movq %rdi, %rbx
1317+
; CHECK-NEXT: callq __gttf2
1318+
; CHECK-NEXT: testl %eax, %eax
1319+
; CHECK-NEXT: setg %bpl
1320+
; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
1321+
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
1322+
; CHECK-NEXT: callq __lttf2
1323+
; CHECK-NEXT: testl %eax, %eax
1324+
; CHECK-NEXT: sets %al
1325+
; CHECK-NEXT: orb %bpl, %al
1326+
; CHECK-NEXT: cmoveq %r14, %rbx
1327+
; CHECK-NEXT: movq %rbx, %rax
1328+
; CHECK-NEXT: addq $32, %rsp
1329+
; CHECK-NEXT: popq %rbx
1330+
; CHECK-NEXT: popq %r14
1331+
; CHECK-NEXT: popq %rbp
1332+
; CHECK-NEXT: retq
1333+
;
1334+
; X86-LABEL: cmp_one_q:
1335+
; X86: # %bb.0:
1336+
; X86-NEXT: pushl %ebp
1337+
; X86-NEXT: pushl %ebx
1338+
; X86-NEXT: pushl %edi
1339+
; X86-NEXT: pushl %esi
1340+
; X86-NEXT: subl $12, %esp
1341+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
1342+
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
1343+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
1344+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1345+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1346+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1347+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1348+
; X86-NEXT: pushl %ebx
1349+
; X86-NEXT: movl %ebx, %esi
1350+
; X86-NEXT: pushl %edi
1351+
; X86-NEXT: pushl %ebp
1352+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1353+
; X86-NEXT: calll __gttf2
1354+
; X86-NEXT: addl $32, %esp
1355+
; X86-NEXT: testl %eax, %eax
1356+
; X86-NEXT: setg %bl
1357+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1358+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1359+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1360+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1361+
; X86-NEXT: pushl %esi
1362+
; X86-NEXT: pushl %edi
1363+
; X86-NEXT: pushl %ebp
1364+
; X86-NEXT: pushl {{[0-9]+}}(%esp)
1365+
; X86-NEXT: calll __lttf2
1366+
; X86-NEXT: addl $32, %esp
1367+
; X86-NEXT: testl %eax, %eax
1368+
; X86-NEXT: sets %al
1369+
; X86-NEXT: orb %bl, %al
1370+
; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
1371+
; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx
1372+
; X86-NEXT: cmovnel %eax, %ecx
1373+
; X86-NEXT: movl (%ecx), %eax
1374+
; X86-NEXT: movl 4(%ecx), %edx
1375+
; X86-NEXT: addl $12, %esp
1376+
; X86-NEXT: popl %esi
1377+
; X86-NEXT: popl %edi
1378+
; X86-NEXT: popl %ebx
1379+
; X86-NEXT: popl %ebp
1380+
; X86-NEXT: retl
1381+
%cond = call i1 @llvm.experimental.constrained.fcmp.f128(
1382+
fp128 %x, fp128 %y,
1383+
metadata !"one",
1384+
metadata !"fpexcept.strict") #0
1385+
%res = select i1 %cond, i64 %a, i64 %b
1386+
ret i64 %res
1387+
}
1388+
12231389
attributes #0 = { nounwind strictfp }
12241390

12251391
declare fp128 @llvm.experimental.constrained.fadd.f128(fp128, fp128, metadata, metadata)

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